KS8737 Micrel Inc, KS8737 Datasheet

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KS8737

Manufacturer Part Number
KS8737
Description
Manufacturer
Micrel Inc
Datasheet

Specifications of KS8737

Lead Free Status / RoHS Status
Not Compliant

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General Description
Operating at 3.3 Volts to meet low voltage and low power
requirement, the KS8737 is a 10/100BaseTX/FX Physical
Layer Transceiver which provides MII interface to transmit
and receive data. It contains the 100BaseTX/FX Physical
Medium Attachment (PMA), Physical Medium Dependent
(PMD), and Physical Coding Sub-layer (PCS) functions.
Moreover, the KS8737 has on-chip 10BaseT encoder/de-
coder and output filtering, which eliminates the need for
external filters and makes possible a single set of line
magnetics to be used to meet requirement for both 100BaseTX/
FX and 10BaseT.
The KS8737 can automatically configure itself for 100 or 10
Mbps and full or half duplex operation, using on-chip Auto-
Negotiation algorithm. It’s an ideal choice of physical layer
transceiver for 100BaseTX/100BaseFX/10BaseT applica-
tions.
Data sheets and support documentation can be found on
Micrel’s web site at www.micrel.com.
Functional Diagram
August 2003
KS8737
Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.micrel.com
1
Features
• Single chip 100BaseTX/100BaseFX/10BaseT physical
• 3.3V CMOS design, 70mA operating current (excluding
• Fully compliant to IEEE 802.3u standard
• Support Media Independent Interface (MII) mode
• Support 10BaseT, 100BaseTX and 100BaseFX Fiber
• Support power down mode and power saving mode
• Configurable through MII serial management ports or via
• Support auto-negotiation and manual selection for
• Support auto-negotiation and manual selection for full-
• Standard CSMA/CD or full-duplex operation at 10Mbps
• On-chip built-in filtering for both 100BaseTX and
3.3V 10/100BaseTX/FX MII Physical Layer Transceiver
layer solution
transmit output driver current)
Channel with Far_End_Fault Detection
external control pins
10Mbps or 100Mbps speed
and half-duplex mode
or 100Mbps
10BaseT
KS8737
Rev 3.11
KS8737
Micrel

Related parts for KS8737

KS8737 Summary of contents

Page 1

... FX and 10BaseT. The KS8737 can automatically configure itself for 100 or 10 Mbps and full or half duplex operation, using on-chip Auto- Negotiation algorithm. It’s an ideal choice of physical layer transceiver for 100BaseTX/100BaseFX/10BaseT applica- tions ...

Page 2

... LED outputs for link, activity, full/half duplex, collision and speed • Supports back to back for media converter applications • Available in 64-pin TQFP surface mount package ( 1.0 mm) KS8737 Ordering Information Part Number Temperature Range KS8737 + Micrel Package 64-Pin TQFP August 2003 ...

Page 3

... Change the Register 1fh.5 mode from RW to RO. Update on the 10/100BT MII receiving timing. Change on register 1fh.1 to reserved. Add the fiber mode description. 3.1 4/01/03 Change the company logo, legal disclaimer, contact info. 3.11 8/29/03 Convert to new format. August 2003 3 Micrel KS8737 ...

Page 4

... Register 15h: RXER Counter .............................................................................................................................. 14 Register 1bh: Interrupt Control/Status Register .................................................................................................. 15 Register 1fh: 100BaseTX PHY Controller ........................................................................................................... 15 Mode Selection for Registers ................................................................................................................................... 17 Typical Application Circuit ....................................................................................................................................... 18 Absolute Maximum Ratings ..................................................................................................................................... 19 Operating Ratings ..................................................................................................................................................... 19 Electrical Characteristics .......................................................................................................................................... 19 Timing Diagrams ....................................................................................................................................................... 21 Selection of Isolation Transformers ........................................................................................................................ 27 Selection of Reference Crystals ............................................................................................................................... 27 Package Outline and Dimensions ............................................................................................................................ 28 KS8737 4 Micrel August 2003 ...

Page 5

... Power Saving Mode Initialization Input. (Affecting Register 1f.15). To disable power saving mode, tie this pin low; otherwise, power saving mode is asserted. This pin can also be used to set FX signal detect threshold in fiber mode. 5 Disable Transmit Local Loopback Remote Loopback Remote Loopback Micrel KS8737 ...

Page 6

... I Serial Management Interface Clock Input. This pin is synchronous to the MDIO data interface Mode Select Input. Active Low. When this pin is low, the KS8737 is in the 100BaseFX mode. O MII Receive Data Output. Active High, clocked out on the falling edge of RXCLK. RXD0 is the LSB. High impedance when PHY is isolated or if RXEN is de- asserted ...

Page 7

... MII Transmit Enable Input. A High on this pin causes the transmit data TXD[3: encoded and scrambled for transmission. I MII Transmit Data Input. TXD0 is the LSB. High impedance when PHY is isolated. O MII Collision Detect Output. Active High. High impedance when PHY is isolated. This signal is de-asserted in full-duplex operation. 7 Micrel KS8737 ...

Page 8

... KS8737 Pin Configuration CRS INTRPT RXENB PHYAD4 PHYAD3 PHYAD2 PHYAD1 PHYAD0 VDD GND X2 X1 FDX MODE0 MODE1 RSTB KS8737 64-Pin TQFP (TQ RXD2 47 RXD3 46 FXMODEB 45 MDC 44 MDIO 43 GND 42 LEDFDX 41 LEDACT 40 LEDLINK 39 LEDCOL 38 LEDSPD 37 VDD PWRDWN 33 DISTX/LPBK August 2003 Micrel ...

Page 9

... When the input exceeds the squelch limit, the PLL locks onto the incoming signal and the KS8737 decodes a data frame. This activates the carrier sense (CRS) ad RXDV signals and makes the receive data (RXD) available. The receive clock is maintained active during idle periods in between data reception. The KS8737 supports extended length cables for 10BaseT by selecting a lower squelch level around 150mV ...

Page 10

... When the KS8737 receives a burst of FLP from its link partner with 3 identical link code words (ignoring acknowledge bit), it will store these code words in Register 5 and wait for the next 3 identical code words. Once the KS8737 detects the second code words, it then configures itself according to above-mentioned priority. In addition, the KS8737 also checks 100BaseTX idle or 10BaseT NLP symbol ...

Page 11

... The detailed connection between the two KS8737’s is shown in the application circuit on the data sheet. In this case TXC become an input pin. The internal FIFO’s will take care of the transition of the receive to transmit clock domain changes. The KS8737 in media converter mode can also handle the jumbo frames ...

Page 12

... Full-Duplex 1.13 100BaseTX Half-Duplex Note 1. RW: Read/Write, RO: Read only, SC: Self clear, LH: Latch High, LL: Latch Low. KS8737 Description 1 = software reset. Bit is self-clearing 1 = loopback mode 0 = normal operation 1 = 100Mbps 0 = 10Mbps Ignored if Auto-Negotiation is enabled (0. enable auto-negotiation process (override 0.13 and 0.8) RW ...

Page 13

... Organizationally Unique Identifier (OUI). Micrel Semiconductor’s OUI is 0010A1 (hex) Six bit manufacturer’s model number Four bit manufacturer’s model number 1 = next page capable next page capability. KS8737 supports next page capability 1 = remote fault supported remote fault 1 = pause function supported pause function capable ...

Page 14

... RW: Read/Write, RO: Read only, SC: Self clear, LH: Latch High, LL: Latch Low. KS8737 Description 1 = next page capable next page capability KS8737 supports next page capability link code word received from partner 0 = link code word not yet received 1 = remote fault detected remote fault 1 = pause function supported ...

Page 15

... No remote fault interrupt 1 = Link up interrupt link up interrupt 1 = enable power saving 0 = disable 1 = interrupt pin active high 0 = active low 1 = auto-negotiation complete 0 = not complete 1 = enable link fail counter 0 = disable 1 = enable jabber counter 0 = disable Reserved 1 = flow control capable flow control 15 Micrel (Note 1) Mode Default KS8737 ...

Page 16

... Operation Mode Indication 1fh.1 Reserved 1fh.0 Disable Data Scrambling Note 1. RW: Read/Write, RO: Read only, SC: Self clear, LH: Latch High, LL: Latch Low. KS8737 Description 1 = enable SQE test 0 = disable 1 = enable symbol mode 0 = disable 1 = isolate transmit 0 = not isolate [000] = still in auto-negotiation [001] = 10BaseT half duplex ...

Page 17

... KS8737 Mode Selection for Register 1fh 4:2 KS8737 can be forced into a specific mode on reset by configuring MODE pins specified in the following table. The strapping option of MODE pins are latched on the rising edge of reset to set the default value of various registers. The values can be modified by writing into the registers ...

Page 18

... KS8737 Typical Application Circuit KS8737 18 Micrel August 2003 ...

Page 19

... RDTX 50 from each output from each output to V from TDTX to magentics 19 (Note 2) ) .......................... +3.135V to +3.465V DD ) ............................. + Air Flow ................................... 53.7 C/W JA Min Typ 100 135 2.0 –10 2 1.25 45 0.7 Micrel Max Units 120 mA 150 0 0 110 ns 1. 0 1.4 ns (pk-pk) KS8737 ...

Page 20

... RXC Receive Clock, 100TX 100 RXC Receive Clock, 10T 10 Receive Clock Jitters TXC Transmit Clock, 100TX 100 TXC Transmit Clock, 10T 10 Transmit Clock Jitters KS8737 Condition 5MHz square wave 50 from each output from each output Micrel Min Typ Max Units 1.4 ...

Page 21

... COL (SQE) Delay Aftter TXEN Ae-Asserted SQE t COL (SQE) Pulse Duration SQEP Table 2. 10BaseT MII Transmit Timing Parameters August 2003 t t HD2 SU2 t HD1 t SU1 Data In t CRS1 t LAT Symbol Out Figure 1. 10BaseT MII Transmit Timing 21 Micrel t CRS2 Min Typ Max Units 1.5 1.0 KS8737 s s ...

Page 22

... RXD [3:0], RXER, RXDV Hold from Rising Edge of RXC HD t RXDV Data Vaild from CSR RLAT t RXP/RXM Preamble to CRS Asserted CRS1 Table 3. 10BaseT MII Receive Timing Parameters Note 1. CRS is asserted but RXD/RXDV are driven from SFD as the first byte of packet. KS8737 t CRS1 t RLAT Figure 2. 10BaseT MII Receive Timing 22 ...

Page 23

... TXEN Low to CRS De-Asserted Latency CRS2 t TXEN High to TXP/TXM Output (TX Latency) LAT Table 4. 100BaseT MII Transmit Timing Parameters August 2003 t t HD2 SU2 t HD1 t SU1 Data In t CRS1 t LAT Symbol Out Figure 3. 100BaseT MII Transmit Timing 23 Micrel t CRS2 Min Typ Max Units KS8737 ...

Page 24

... RXD [3:0], RXER, RXDV Hold from Rising Edge of RXC HD t CRS to RXD Latency Aligned RLAT t “Start of Stream” to CSR Asserted CRS1 t “End of Stream” to CSR De-Asserted CRS2 Table 5. 100BaseT MII Receive Timing Parameters KS8737 End of Stream t CRS1 t RLAT Figure 4. 100BaseT MII Receive Timing ...

Page 25

... Clock Pulse to Clock Pulse CTC Number of Clock/Data Pulses per Burst Table 6. Auto Negotiation/Fast Link Pulse Timing Parameters August 2003 FLP FLP Burst Burst t FLPW t BTB Clock Data Clock Pulse Pulse Pulse CTD t CTC 25 Micrel Data Pulse Min Typ Max Units 100 136 KS8737 ...

Page 26

... Strap-In / Output Pin Symbol Parameter t Stable Supply Voltages to Reset High sr t Configuration Set-Up Time cs t Configuration Hold Time ch t Reset to Strap-In Pin Output rc KS8737 MD1 MD2 Valid Data t MD3 Figure 6. Serial Management Interface Timing tsr tcs tch trc Figure 7. Reset Timing Table 8 ...

Page 27

... An oscillator or crystal with the following typical characteristics is recommended. Characteristics Name Frequency Frequency Tolerance (max.) Load Capacitance (max.) Series Resistance (max.) August 2003 (Note 1) Value Test Condition 350 H 100mV, 100kHz, 8mA 0.4 H 1MHz (min.) 12pF 0.9 1.0dB 0MHz – 65MHz 1500Vrms Value Units 25.00000 MHz 100 ppm Micrel KS8737 ...

Page 28

... A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify KS8737 +0.05 — ...

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