CY7B933-JC Cypress Semiconductor Corp, CY7B933-JC Datasheet

CY7B933-JC

Manufacturer Part Number
CY7B933-JC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7B933-JC

Lead Free Status / RoHS Status
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Features
CY7B923 Transmitter Block Diagram
Cypress Semiconductor Corporation
Document #: 38-02017 Rev. *H
Fibre Channel-compliant
IBM ESCON
DVB-ASI-compliant
ATM-compliant
8B/10B-coded or 10-bit unencoded
Standard HOTLink
High-speed HOTLink: 160 to 400 Mbps for high-speed
applications
Transistor-transistor logic (TTL)-synchronous I/O
No external phase locked-loop (PLL) components
Triple positive emitter coupled logic (PECL) 100 K serial
outputs
Dual PECL 100 K serial inputs
Low-power: 350 mW (Tx), 650 mW (Rx)
Compatible with fiber-optic modules, coaxial cable, and twisted
pair media
Built-in self-test (BIST)
Single +5-V supply
28-pin small outline integrated circuit (SOIC)/plastic leaded
chip carrier (PLCC)/leadless chip carrier (LCC)
Pb-free packages available
0.8- bipolar complementary metal oxide semiconductor
(BiCMOS)
-compliant
: 160 to 330 Mbps
198 Champion Court
HOTLink
Functional Description
The CY7B923 HOTLink
receiver are point-to-point communications building blocks that
transfer data over high-speed serial links (fiber, coax, and twisted
pair). Standard HOTLink data rates range from 160 to 330 Mbps.
Higher speed HOTLink is also available for high-speed applica-
tions (160 to 400 Mbits/second).
connections to host systems or controllers.
Eight bits of user data or protocol information are loaded into the
HOTLink transmitter and are encoded. Serial data is shifted out
of the three differential PECL serial ports at the bit rate (which is
ten times the byte rate).
The HOTLink receiver accepts the serial bit stream at its differ-
ential line receiver inputs and, using a completely integrated PLL
clock synchronizer, recovers the timing information necessary
for data reconstruction. The bit stream is deserialized, decoded,
and checked for transmission errors. Recovered bytes are
presented in parallel to the receiving host along with a byte-rate
clock.
The 8B/10B encoder/decoder can be disabled in systems that
already encode or scramble the transmitted data. I/O signals are
available to create a seamless interface with both asynchronous
FIFOs (that is, CY7C42X) and clocked FIFOs (that is,
CY7C44X). A BIST pattern generator and checker allows testing
of the transmitter, receiver, and the connecting link as a part of a
system diagnostic check.
HOTLink devices are ideal for a variety of applications where a
parallel interface can be replaced with a high-speed
point-to-point serial link. Applications include interconnecting
workstations, servers, mass storage, and video transmission
equipment.
San Jose

Transmitter/Receiver
,
CA 95134-1709
transmitter and CY7B933 HOTLink
CY7B923, CY7B933
Figure 1
Revised October 14, 2010
illustrates typical
408-943-2600
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Related parts for CY7B933-JC

CY7B933-JC Summary of contents

Page 1

... Applications include interconnecting workstations, servers, mass storage, and video transmission equipment. • 198 Champion Court • San Jose CY7B923, CY7B933  Transmitter/Receiver ‚ transmitter and CY7B933 HOTLink Figure 1 illustrates typical , CA 95134-1709 • 408-943-2600 Revised October 14, 2010 [+] Feedback ...

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... CY7B933 Receiver Block Diagram HOST Document #: 38-02017 Rev. *H Figure 1. HOTLink System Connections SERIAL LINK CY7B923, CY7B933 HOST Page [+] Feedback ...

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... Transmission Characters........................................... 20 Valid Data Characters (SC/D = LOW) ............................ 21 Valid Special Character Codes and Sequences (SC/D = HIGH) ............................................................................... 29 Maximum Ratings........................................................... 30 Operating Range............................................................. 30 CY7B923/CY7B933 Electrical Characteristics Over the Oper- ating Range ...................................................................... 30 Capacitance .................................................................... 31 Transmitter Switching Characteristics Over the Operating Range ............................................................................... 32 Receiver Switching Characteristics Over the Operating Range ...

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... CCN 25 BISTEN ENN 5 24 GND 6 ENA 23 MODE CCQ 7B923 RP CKW GND CCQ 9 20 SVS(D ) SC/D PLCC/LCC Top View 2726 28 BISTEN FOTO 25 5 GND ENN 24 6 MODE 23 ENA 7 7B923 CCQ V 21 CKW 9 CCQ SVS(D ) GND SC/D 1213 1718 a CY7B923, CY7B933 ) Page [+] Feedback ...

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... Figure 3. CY7B933 Receiver Pin Configurations Document #: 38-02017 Rev. *H SOIC Top View INB(INB+) INA SI(INB ) INA A MODE BISTEN 4 REFCLK CCQ GND CKR RDY 7 22 7B933 V GND 21 8 CCQ V GND 9 20 CCN SC/D (Q RVS ( PLCC/LCC Top View 2726 RF REFCLK 25 5 GND ...

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... OUTA± and OUTB± are CC goes directly to the shifter. When left floating (internal resistors hold the input at V CY7B923, CY7B933 ) acts as D input. SC/D has the same timing a a and SC/D determines the code 0 ...

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... Table 2. CY7B933 HOTLink Receiver Name I/O Description Q TTL Out Q parallel data output. Q 07 0– nously with CKR. When MODE is HIGH  TTL Out Special character/data select. SC/D indicates the context of received data. HIGH indicates a Control a (Special Character) code, LOW indicates a Data character. When MODE is HIGH (placing the receiver ...

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... Table 2. CY7B933 HOTLink Receiver (continued) Name I/O Description BISTEN TTL In Built-in self-test enable. When BISTEN is LOW the Receiver awaits a D0.0 (sent once per BIST loop) character and begins a continuous test sequence that tests the functionality of the Transmitter, the Receiver, and the link connecting them. In BIST mode the status of the test can be monitored with RDY and RVS outputs ...

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... CY7B923 HOTLink Transmitter Operating Mode Description on page 11. CY7B933 HOTLink Receiver Block Diagram Description Serial Data Inputs Two pairs of differential line receivers are the inputs for the serial data stream. INA± or INB± can be selected with the A/B input. ...

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... Description. Document #: 38-02017 Rev. *H HOTLink CY7B923 Transmitter and CY7B933 Receiver Operation The CY7B923 Transmitter operating with the CY7B933 Receiver form a general purpose data communications subsystem capable of transporting user data Mbytes per second 29. Data patterns (40 Mbytes per second for –400 devices) over several types of serial interface media ...

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... Figure 4. CY7B933 Receiver Data Pipeline in Encoded Mode SERIAL DATA IN  INX DATA CKR Q , 07 DATA SC/D, RVS RDY RDY IS LOW FOR DATA Figure 5. CY7B933 Framing Operation in Encoded Mode RF LATCHED ON FALLING EDGE OF CKR CKR 07 SC/D, DATA DATA RVS RDY The transmitter and receiver parallel interface timing and ...

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... Special Figure 6. Seamless FIFO Interface R Q ENR 0– SC/D ENN 0– SC/D CKR 0– CKW 0–8 CY7B923, CY7B933 = 111 00000 and SC/D = 7–0 CLOCKED FIFO 7C44X/5X Q CKR 0– SC/D CKW 0–7 7B923 HOTLink TRANSMITTER HOTLink RECEIVER 7B933 RDY Q , SC/D 0– ...

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... This mode is available with minimal impact on user system logic, and can be used as part of the normal system diagnostics. Typical connections and timing are shown in CY7B923, CY7B933 ) < (peak-peak). Typically j ) < 175 ps (peak-peak). Typically measured ...

Page 14

... D E CY7B933 Receiver 28 IB IB– IA IA– 0.01 F GND Fiber Optic PECL Load CY7B923, CY7B933 0.01 F VCC Fiber Optic Fiber Tx TX TX+ TX– GND Coax or Twisted Pair A B 270 270 0.01 F 649 1500 RL/2 Coax or Twisted Pair RL/2 Optional Signal Det ...

Page 15

... RVS output in the receiver. This can be done by explicitly sending a violation with the SVS input, or allowing the transmitter BIST loop to run while the receiver runs in normal mode. The BIST loop includes deliberate violation symbols and will adequately test the RVS function. CY7B923, CY7B933 OUTA OUTB OUTC SO ...

Page 16

... This forces the two outputs ‘PECL LOW’ which can be ignored while the test system creates a differential input signal at some higher voltage. Document #: 38-02017 Rev. *H CY7B933 HOTLink Receiver Operating Mode Description In normal user operation, the receiver can operate in either of two modes. The encoded mode allows a user system to send and receive eight-bit data and control information without first converting it to transmission characters ...

Page 17

... When RDY resumes, the received data will be properly framed and will be decoded correctly. In Bypass mode with RF HIGH, RDY will pulse once for each K28.5 received. For more information on the RDY pin, consult the “HOTLink CY7B933 RDY Pin Description” application note. Document #: 38-02017 Rev. *H ...

Page 18

... Receiver Test Mode Description The CY7B933 receiver offers two types of test mode operation, BIST mode and Test mode normal system application, the Built-In Self-Test (BIST) mode can be used to check the function- ality of the transmitter, the receiver and the link connecting them. ...

Page 19

... X3.230-199X ANSI FC-PH Standard). IBM Enterprise Systems Architecture/390 ESCON I/O Interface (document number SA22-7202). Document #: 38-02017 Rev. *H CY7B923, CY7B933 8B/10B Transmission Code The following information describes how the tables shall be used for both generating valid Transmission Characters (encoding) and checking the validity of received Transmission Characters (decoding) ...

Page 20

... Table 4 shows an example of this behavior. Character RD Character D21.1 – D10.2 101010 1001 – 010101 0101 101010 1011 + 010101 0101 D21.0 + D10.2 CY7B923, CY7B933 Table 3 Hex Value Character RD – D23.5 + – 111010 1010 + + 111010 1010 + + Code Violation ...

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... CY7B923, CY7B933 Page [+] Feedback ...

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... CY7B923, CY7B933 Page [+] Feedback ...

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... CY7B923, CY7B933 Page [+] Feedback ...

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... CY7B923, CY7B933 Page [+] Feedback ...

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... CY7B923, CY7B933 Page [+] Feedback ...

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... CY7B923, CY7B933 Page [+] Feedback ...

Page 27

... CY7B923, CY7B933 Page [+] Feedback ...

Page 28

... CY7B923, CY7B933 Page [+] Feedback ...

Page 29

... Code Rule Violation and SVS Tx Pattern 111 00000 100111 1000 111 00001 001111 1010 111 00010 110000 0101 Running Disparity Violation Pattern 111 00100 110111 0101 CY7B923, CY7B933 Current RD+ fghj abcdei fghj 110000 1011 110000 0110 110000 1010 110000 1100 110000 1101 110000 0101 110000 ...

Page 30

... TTL OUTs, CY7B923: RP; CY7B933 Output HIGH voltage OHT V Output LOW voltage OLT I Output short circuit current OST TTL INs, CY7B923 SC/D, SVS, ENA, ENN, CKW, FOTO, BISTEN; CY7B933: RF, REFCLK, BISTEN 07 V Input HIGH voltage IHT V Input LOW voltage ILT I Input HIGH current IHT ...

Page 31

... CY7B923/CY7B933 Electrical Characteristics Miscellaneous [11] I Transmitter power supply CCT current [12] I Receiver power supply CCR current Capacitance [13] Parameter Description C Input capacitance IN OUTPUT R1 = 910 510  < (Includes fixture and probe capacitance) (a) TTL AC Test Load 3.0V 3.0V 2.0V 1.0V GND < (c) TTL Input Test Waveform Notes 11 ...

Page 32

... CKW, but not RP function or timing pF. L 2.0V, over the operating range. CC /10 if data is being received. See note. CKW , SC/D, and RVS) are loaded with similar DC and AC loads. 07 CY7B923, CY7B933 7B923 7B923-400 Unit Min Max Min Max 30.3 62 ...

Page 33

... SENP t t HENP SD NOTES 16,17 VALID DATA PDF t PDR t PPWH t CKW t CPWH t CPWL and V specification (approximately CY7B923, CY7B933 [7] 7B933 7B933-400 Unit Min Max. Min Max 6.5 – 6.5 – ns 6.5 – 6.5 – ns – 20 – – 100 – 100 ps 0.9t – ...

Page 34

... Figure 11. Switching W0aveforms for the CY7B933 HOTLink Receiver CKR RDY – SC/D,RVS, t CPXL REFCLK NOTE SO Static Alignment /2   INA ,  INB SAMPLE WINDOW Document #: 38-02017 Rev CPRH t CPRL t t PRH RH t PRF CKX t CPXH 1.5V Error-free Window /2   INA  ...

Page 35

... Standard CY7B923-JC CY7B923-JXC CY7B923-JXCT CY7B923-JXI CY7B923-JXIT CY7B923-SXC CY7B923-SXCT 400 CY7B923-400JXC CY7B923-400JXCT Standard CY7B933-JC CY7B933-JXC CY7B933-JXCT CY7B933-JXI CY7B933-JXIT CY7B933-SXC CY7B933-SXCT 400 CY7B933-400JXC CY7B933-400JXCT Notes 29. C1.7 = Transmit Negative K28.5 (–K28.5+) disregarding Current RD. The receiver will only output this Special Character if K28.5 is received with the wrong running disparity. The receiver will output C1.7 if K28.5 is received with RD+, otherwise K28.5 is decoded as C5.0 or C2.7. 30. C2.7 = Transmit Positive K28.5 (+K28.5– ...

Page 36

... Figure 13. 28-Pin Plastic Leaded Chip Carrier J64 Document #: 38-02017 Rev. *H Tape and reel Temperature range Commercial Industrial Package type PLCC PLCC (Pb-Free SOIC (Pb-Free) Base part number: 923 = Transmitter, 933 = Receiver Marketing Code HOTLink Transmitter/Receiver Company ID Cypress CY7B923, CY7B933 51-85001 *B Page [+] Feedback ...

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... Package Diagrams Figure 14. 28-Pin (300-Mil) Molded SOIC S21 Document #: 38-02017 Rev. *H CY7B923, CY7B933 51-85026 *E Page [+] Feedback ...

Page 38

... LPEN local loopback input PECL positive-ECL PLL phase-locked loop TTL transistor-transistor logic VCO voltage controlled oscillator Document #: 38-02017 Rev. *H CY7B923, CY7B933 Document Conventions Units of Measure Symbol Unit of Measure °C degrees Celsius MHz megahertz µA microamperes µs microseconds ...

Page 39

... Document History Page Document Title: CY7B933/CY7B923 HOTLink Document Number: 38-02017 Submission Orig. of REV ECN NO. Date Change ** 105855 03/28/01 *A 112164 03/25/02 *B 114562 03/27/02 *C 125525 04/01/03 OOR *D 132104 12/22/03 *E 393422 See ECN *F 2896112 03/19/10 CGX *G 3028517 09/13/2010 *H 3059305 10/14/2010 SAAC Document #: 38-02017 Rev. *H  ...

Page 40

... Use may be limited by and subject to the applicable Cypress software license agreement. Document #: 38-02017 Rev. *H ESCON is a registered trademark of IBM. HOTLink is a registered trademark of Cypress Semiconductor. All product and company names mentioned in this document may be the trademarks of their respective holders. cypress.com/go/plc Revised October 14, 2010 CY7B923, CY7B933 PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 ...

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