CY7B9334-270JC Cypress Semiconductor Corp, CY7B9334-270JC Datasheet
CY7B9334-270JC
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CY7B9334-270JC Summary of contents
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... SMPTE HOTLink devices are ideal for a variety of video applica- tions including video transmission equipment, video recorders, video editing equipment, and video routers. CY7B9334 Receiver Logic Block Diagram ) a RF SVS(D ...
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... Operating Range................................................................ 11 Switching Waveforms for the CY7B9234 SMPTE HOTLink Transmitter ........................................................................ 12 Switching Waveforms for the CY7B9334 Document #: 38-02014 Rev. *B SMPTE HOTLink Receiver ................................................13 SMPTE HOTLink CY7B9234 Transmitter and CY7B9334 Re- ceiver Operation ................................................................14 CY7B9234 SMPTE HOTLink Transmitter Operating Mode Description ............................................16 Encoded Mode Operation ............................................16 Bypass Mode Operation ...............................................16 PECL Output Functional and Connection Options ...
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... ENA may be held HIGH/LOW continuously or it may be pulsed with each data byte to be sent. If ENA is being used for data control, ENN will normally be strapped HIGH, but can be used for BIST function control. Document #: 38-02014 Rev. *B SERIAL LINK CY7B9334 Receiver Pin Configuration FOTO ENN GND ENA ...
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... OUTA± and OUTB± are controlled by the CC /2). CC goes directly to the shifter. When left floating (internal resistors hold the input GND. CC CY7B9234 CY7B9334 at the next rising edge of 0−7 at the 0−7 , data inputs bypass the encoder and the CC /2) the CC ...
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... Pin Description CY7B9334 SMPTE HOTLink Receiver Name I/O Description Q TTL Out Q Parallel Data Output. Q 0−7 0− nously with CKR. When MODE is HIGH − h SC/D(Q ) TTL Out Special Character/Data Select. SC/D indicates the context of received data. HIGH indicates a Control a (Special Character) code, LOW indicates a Data character. When MODE is HIGH (placing the receiver in ...
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... Pin Description CY7B9334 SMPTE HOTLink Receiver (continued) Name I/O Description BISTEN TTL In Built-In Self-Test Enable. When BISTEN is LOW the Receiver awaits a D0.0 (sent once per BIST loop) character and begins a continuous test sequence that tests the functionality of the Transmitter, the Receiver, and the link connecting them ...
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... PLL. The RP pulse stream will insure correct data transfers between asynchronous FIFOs and the transmitter input latch with no external logic. CY7B9334 SMPTE HOTLink Receiver Block Diagram Description Serial Data Inputs Two pairs of differential line receivers are the inputs for the serial data stream. INA± ...
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... Test logic includes the initialization and control for the Built-In Self-Test (BIST) generator, the multiplexer for Test mode clock distribution, and control logic for the decoder. Test logic is discussed in more detail in the CY7B9334 SMPTE HOTLink Receiver Operating Mode Description. CY7B9234 CY7B9334 ...
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... TTL OUTs, CY7B9234: RP; CY7B9334 Output HIGH Voltage OHT V Output LOW Voltage OLT I Output Short Circuit Current OST TTL INs, CY7B9234 SC/D, SVS, ENA, ENN, CKW, FOTO, BISTEN; CY7B9334: RF, REFCLK, BISTEN 0−7 V Input HIGH Voltage IHT V Input LOW Voltage ILT I Input HIGH Current IHT ...
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... CY7B9234/CY7B9334 Electrical Characteristics Parameter Description Differential Line Receiver Input Pins: INA+, INA−, INB+, INB− V Input Differential Voltage DIFF |(IN+) − (IN−)| V Highest Input HIGH Voltage IHH V Lowest Input LOW Voltage ILL I Input HIGH Current IHH [4] I Input LOW Current ILL ...
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... CKW, but not RP function or timing pF. L −2.0V, over the operating range. CC /10 if data is being received. See note. CKW , SC/D, and RVS) are loaded with similar DC and AC loads. 0−7 , and V specification (approximately CY7B9234 CY7B9334 7B9234-270 7B9234-400 Unit Min Max Min Max −3 − −3 − ...
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... NOTES 10,11 D – SC/D, SVS, BISTEN RP t CPWL CKW t SD ENN D – SC/D, SVS, BISTEN Document #: 38-02014 Rev CKW t CPWH t CPWL t SENP t t HENP SD VALID DATA PDF t PDR t PPWH t CKW t CPWH t HD VALID DATA t SD CY7B9234 CY7B9334 DISABLED ENABLED t HD Page [+] Feedback ...
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... Switching Waveforms for the CY7B9334 SMPTE HOTLink Receiver t CPRH CKR t PRH RDY − SC/D,RVS, t CPXL REFCLK NOTE 20 SO Static Alignment t /2− ± INA , ± INB SAMPLE WINDOW Document #: 38-02014 Rev CKR t CPRL PRF t CKX t CPXH 1.5V Error-F ree Window t /2− t ...
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... Operating Mode Description.” Figure 3 illustrates the data flow through the SMPTE HOTLink CY7B9334 receiver pipeline. Serial data is sampled by the receiver on the INx± inputs. The receiver PLL locks onto the serial bit stream and generates an internal bit rate clock. The bit Document #: 38-02014 Rev. *B − ...
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... Figure 3. CY7B9334 Receiver Data Pipeline in Encoded Mode SERIAL DATA IN ± INX DATA CKR Q0−7, DATA SC/D, RVS RDY RDY IS LOW FOR DATA Figure 4. CY7B9334 Framing Operation in Encoded Mode RF LATCHED ON FALLING EDGE OF CKR CKR RF Q0−7, SC/D, DATA DATA RVS RDY When the RF pin is asserted HIGH, RDY leaves it normal mode of operation and is asserted HIGH while the framer searches the data stream for a K28 ...
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... Receiver PLL data synchronizer (one per 10 bit byte on average), and that it be compatible with the transmission media. Occasional long run length data patterns > 20 bits are acceptable. CY7B9234 CY7B9334 Page [+] Feedback ...
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... Encoded mode. provided to simplify and augment this control function (typically found in laser-based transmission systems). FOTO will force OUTA+ and OUTB LOW, OUTA− and OUTB− HIGH, CY7B9234 CY7B9334 CLOCKED FIFO 7C44X/5X CKR Q 0 − 8 ...
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... VCC D E CY7B9334 Receiver 28 IB IB– IA IA– .01UF GND Fiber-optic PECL Load CY7B9234 CY7B9334 [23] .01UF VCC Fiber-optic Fiber Tx TX TX+ TX– GND Coax or Twisted Pair A B 270 270 .01UF 649 1500 RL/2 Coax or Twisted Pair RL/2 Optional Signal Det. ...
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... Note: It may be advisable to send violation characters to test the RVS output in the Receiver. This can be done by explicitly sending a violation with the SVS input, or allowing the transmitter BIST loop to run while the Receiver runs in normal mode. The CY7B9234 CY7B9334 OUTA OUTB OUTC SO DON'T CARE ...
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... Test mode is used for factory or CC incoming device test. CY7B9334 SMPTE HOTLink Receiver Operating Mode Description In normal user operation, the Receiver can operate in either of two modes. The Encoded mode allows a user system to send and receive 8-bit data and control information without first converting it to transmission characters ...
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... Receiver Test Mode Description The CY7B9334 Receiver offers two types of test mode operation, BIST mode and Test mode normal system appli- cation, the Built-In Self-Test (BIST) mode can be used to check the functionality of the Transmitter, the Receiver and the link connecting them ...
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... HOTLink D/Q designation—76543210 8B/10B bit designation—HGFEDCBA To clarify this correspondence, the following example shows the conversion from an FC-2 Valid Data Byte to a Transmission Character (using 8B/10B Transmission Code notation) FC-2 45 CY7B9234 CY7B9334 , 0-7 Fibre Channel Bits: 7654 3210 0100 0101 Page ...
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... Running disparity at the end of any sub-block is negative if the sub-block contains more zeros than ones also negative at the end of the 6-bit sub-block if the 6-bit sub-block is 111000, and it is negative at the end of the 4-bit sub-block if the 4-bit sub-block is 1100. CY7B9234 CY7B9334 Page [+] Feedback ...
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... CY7B9234 CY7B9334 Data OUT Hex Value 765 43210 000 00000 00 000 00001 01 000 00010 010 00101 45 ...
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... Code Rule Violation and SVS Tx Pattern 111 00000 100111 1000 111 00001 001111 1010 111 00010 110000 0101 Running Disparity Violation Pattern 111 00100 110111 0101 CY7B9234 CY7B9334 Current RD+ abcdei fghj 110000 1011 110000 0110 110000 1010 110000 1100 110000 1101 110000 0101 110000 1001 110000 ...
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... CY7B9234-400JC Speed Ordering Code Package Name [34] 270 CY7B9334-270JC [34] 400 CY7B9334-400JC Notes 29. C0.7 = Transmit a deliberate code rule violation. The code chosen for this function follows the normal Running Disparity rules. Transmission of this Special Character has the same effect as asserting SVS = HIGH. ...
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... Document #: 38-02014 Rev. *B 28-Lead Plastic Leaded Chip Carrier J64 SEATING PLANE 26 25 0.045 0.055 19 0.026 0.032 18 CY7B9234 CY7B9334 DIMENSIONS IN INCHES MIN. MAX. 0.013 0.021 0.390 0.430 0.020 MIN. 0.090 0.120 51-85001-*A 0.165 0.180 Page [+] Feedback ...
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... Document History Page Document Title:CY7B9234/CY7B9334 SMPTE HOTLink Document Number: 38-02014 REV. ECN NO. Issue Date ** 105852 03/28/01 *A 282669 See ECN *B 2828438 12/15/09 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress ...