SLXT973QCA3V 856775 Intel, SLXT973QCA3V 856775 Datasheet - Page 20

SLXT973QCA3V 856775

Manufacturer Part Number
SLXT973QCA3V 856775
Description
Manufacturer
Intel
Datasheet

Specifications of SLXT973QCA3V 856775

Lead Free Status / RoHS Status
Not Compliant
LXT973 10/100 Mbps Dual-Port Fast Ethernet PHY Transceiver
20
Table 6.
Table 7.
LXT973 Power Supply Signal Descriptions
LXT973 Per Port LED and Configuration Signal Descriptions
40, 91
27, 47,
84, 96
74
58, 73
65, 66
16, 41, 90,
28, 48, 83,
95
77
69, 62
61, 70
14
49
50
51
82
81
80
6
5
1. AI = Analog Input, AO = Analog Output, I = Input, O = Output, OD = Open Drain output,
1. AI = Analog Input, AO = Analog Output, I = Input, O = Output, OD = Open Drain output,
Pin #
Pin #
ST = Schmitt Triggered input, TS = Tri-State-able output, SL = Slew-rate Limited output,
IP = Weak Internal Pull-up, ID = Weak Internal Pull-Down
ST = Schmitt Triggered input, TS = Tri-State-able output, SL = Slew-rate Limited output,
IP = Weak Internal Pull-up, ID = Weak Internal Pull-Down
LED0_1
LED0_2
LED0_3
LED1_1
LED1_2
LED1_3
AUTO_NEG0
AUTO_NEG1
Signal Names
VCCD
VCCIO
VCCPECL
VCCR
VCCT
GNDD
GNDIO
GNDPECL
GNDR
GNDT
SGND
Signal Names
Type
OD, TS,
OD, TS,
Type
SL, IP
SL, IP
_
_
_
_
_
_
_
_
_
_
_
I
I
1
1
Digital Power Supply - Core. +2.5V supply for core digital circuits.
Digital Power Supply - I/O Ring. +2.5/3.3V supply for digital I/O
circuits. The digital input circuits running off this rail, having a TTL-
level threshold and over-voltage protection, may be interfaced with
3.3/5.0V when the I/O supply is 3.3V, and 2.5/3.3/5.0V when the I/O
supply is 2.5V.
Digital Power Supply - PECL Signal Detect Inputs. +2.5/3.3V
supply for PECL Signal Detect input circuits. If Fiber Mode is not
used, tie these pins to GNDPECL to save power.
Analog Power Supply - Receive. +2.5V supply for all analog
receive circuits.
Analog Power Supply - Transmit. +2.5V supply for all analog
transmit circuits.
Digital Ground. Ground return for core digital supplies (VCCD). All
ground pins can be tied together using a single ground plane.
Digital GND - I/O Ring. Ground return for digital I/O circuits
(VCCIO).
Digital GND - PECL Signal Detect Inputs. Ground return for
PECL Signal Detect input circuits.
Analog Ground - Receive. Ground return for receive analog
supply. All ground pins can be tied together using a single ground
plane.
Analog Ground - Transmit. Ground return for transmit analog
supply. All ground pins can be tied together using a single ground
plane.
Substrate Ground. Ground for chip substrate. All ground pins can
be tied together using a single ground plane.
Port 0 LED Drivers 1-3. These pins drive LED indicators for Port
0. Each LED can display one of several available status conditions
as selected by the LED Configuration Register.
Port 1 LED Drivers 1-3. These pins drive LED indicators for Port
1. Each LED can display one of several available status conditions
as selected by the LED Configuration Register.
Auto Negotiation Enable. When this pin is High, auto-negotiation
is enabled on the relevant port.
Signal Description
Signal Description
Rev. Date: March 1, 2002
Document #: 249426
Revision #: 002
Datasheet

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