SLXT973QCA3V 856775 Intel, SLXT973QCA3V 856775 Datasheet - Page 9

SLXT973QCA3V 856775

Manufacturer Part Number
SLXT973QCA3V 856775
Description
Manufacturer
Intel
Datasheet

Specifications of SLXT973QCA3V 856775

Lead Free Status / RoHS Status
Not Compliant
Revision History
Datasheet
Document #: 249426
Revision #: 002
Rev. Date: March 1, 2002
February 2001
March 1, 2001
May 2001
April 2001
Date
Revision
002
001
0.2
0.1
77-85
Page
37
39
53
61
64
72
73
73
74
74
75
75
75
76
86
86
88
11
Figure 1 “LXT973 Block
Added note to diagram.
Under
Removed Table 10: 4B/5B Coding.
Section 3.10.1, “Monitoring
paragraphs 3 and 4, and Figure 11.
Under
Removed Table 16: 4B/5B Coding.
Section 12.0, “Register Definitions”
Removed “multiple 11-bit registers, with” from first sentence.
Table 20 “PHY Identification Register 2 (Address
Changed default for Register bits 3.9:4 from “001110” to
“100001”.
Table 29 “Absolute Maximum Ratings”
Supply: added V
Added three table notes.
Table 40 “Digital Input/Output Characteristics”
Modified table note 2.
Table 32 “Digital Input/Output Characteristics - MII Pins”
Removed “Driver Output Impedance.”
Table 34 “LED Pin Characteristics”
Added MAX value to Output High Current.
Table 35 “100BASE-TX Transceiver Characteristics”
Added Typ values.
Table 36 “10BASE-T Transceiver Characteristics”
Added/replaced Typ values.
Removed “Receiver Input Impedance.”
Table 37 “100BASE-FX Transceiver Characteristics”
Added Typ values
Table 38 “10BASE-T Link Integrity Timing Characteristics”
Added Typ value for Link Pulse Width
Added
Modified
Added
Timing
Added
and
Parameters”
Section A, “Product Ordering
Added product ordering information table and diagram.
Initial Release (Preliminary datasheet)
Advance Datasheet (See Specification Update for Detail)
Advance Datasheet
Table 51 “RESET Pulse Width and Recovery Timing
Section 3.8.4, “PMA
Section 8.1, “Displaying Symbol
Figure 39 “Power-Up Timing”
Figure 40 “RESET Pulse Width and Recovery Timing”
Table 39 “Twisted-Pair
Parameters”.
Table 40 on page 77
CC
A, V
CC
Description
Diagram”:
, VCCPECL, VCCIO information.
Sublayer”:
Auto-Negotiation”: Removed
Information”:
Pins”.
through
and
Table 49 on page
Modified Power
Errors”:
Table 50 “Power-Up
3)”:
Contents
85.
9

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