SLXT973QC.A2 Intel, SLXT973QC.A2 Datasheet - Page 40
SLXT973QC.A2
Manufacturer Part Number
SLXT973QC.A2
Description
Manufacturer
Intel
Datasheet
1.SLXT973QC.A2.pdf
(88 pages)
Specifications of SLXT973QC.A2
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LXT973 10/100 Mbps Dual-Port Fast Ethernet PHY Transceiver
40
Table 10. LED Configurations
Figure 11. Typical LED Implementation
The LED driver pins are open drain circuits (10 mA maximum current rating). If an LEDx_n pin is
unused, terminate with a 10K pull-up resistor.
When configured for modes 2 or 4, the LEDs blink at the rate of 100 ms to display multiple status.
Table 10
LED_CFG0
LEDx_n
0
1
0
1
pin
provides LED configurations for the LXT973.
LED_CFG1
0
0
1
1
220
LEDn_1
Speed
Speed
Speed
Link
VLED
Figure 11
Link/MII Isolate
Link/Activity
LEDn_2
Receive
Link
shows a typical LED implementation.
Duplex/Collision
Duplex/Collision
Transmit
LEDn_3
Duplex
Rev. Date: March 1, 2002
Document #: 249426
Revision #: 002
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