XC5VLX50T-1FFG665C Xilinx Inc, XC5VLX50T-1FFG665C Datasheet - Page 242

FPGA, VIRTEX-5 LXT, 50K, 665FCBGA

XC5VLX50T-1FFG665C

Manufacturer Part Number
XC5VLX50T-1FFG665C
Description
FPGA, VIRTEX-5 LXT, 50K, 665FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr

Specifications of XC5VLX50T-1FFG665C

No. Of Logic Blocks
7200
Family Type
Virtex-5
No. Of Speed Grades
1
Total Ram Bits
2211840
No. Of I/o's
360
Clock Management
DCM, PLL
I/o Supply Voltage
3.3V
Operating Frequency Max
550MHz
Number Of Logic Elements/cells
46080
Number Of Labs/clbs
3600
Number Of I /o
360
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
665-BBGA, FCBGA
Core Supply Voltage Range
1V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
122-1565

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Chapter 6: SelectIO Resources
242
X-Ref Target - Figure 6-30
Table 6-6
LVCMOS25 I/O standards.
Table 6-6: Allowed Attributes for the LVCMOS33 and LVCMOS25 I/O Standards
Table 6-7
LVCMOS15 I/O standards.
Table 6-7: Allowed Attributes for the LVCMOS18 and LVCMOS15 I/O Standard
IOSTANDARD
DRIVE
SLEW
IOSTANDARD
DRIVE
SLEW
LVCMOS
LVCMOS
Attributes
Attributes
details the allowed attributes that can be applied to the LVCMOS33 and
details the allowed attributes that can be applied to the LVCMOS18 and
IOB
IOB
Figure 6-30: LVCMOS Bidirectional Termination
Note: V
V
www.xilinx.com
TT
R P = Z 0
TT
IBUF/IBUFG
IBUF/IBUFG
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
is any voltage from 0V to V CCO
UNUSED
UNUSED
UNUSED
UNUSED
Z 0
Z 0
R P = Z 0
V
TT
2, 4, 6, 8, 12, 16, 24
OBUF/OBUFT
OBUF/OBUFT
{FAST, SLOW}
2, 4, 6, 8, 12, 16
{FAST, SLOW}
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
Primitives
Primitives
IOB
IOB
LVCMOS
LVCMOS
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
2, 4, 6, 8, 12, 16, 24
{FAST, SLOW}
2, 4, 6, 8, 12, 16
{FAST, SLOW}
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
ug190_6_27_022806
IOBUF
IOBUF

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