FPGA, VIRTEX-5 LXT, 50K, 665FCBGA

XC5VLX50T-1FFG665C

Manufacturer Part NumberXC5VLX50T-1FFG665C
DescriptionFPGA, VIRTEX-5 LXT, 50K, 665FCBGA
ManufacturerXilinx Inc
SeriesVirtex™-5 LXT
XC5VLX50T-1FFG665C datasheets
Product Change Notification
 


Specifications of XC5VLX50T-1FFG665C

No. Of Logic Blocks7200Family TypeVirtex-5
No. Of Speed Grades1Total Ram Bits2211840
No. Of I/o's360Clock ManagementDCM, PLL
I/o Supply Voltage3.3VOperating Frequency Max550MHz
Number Of Logic Elements/cells46080Number Of Labs/clbs3600
Number Of I /o360Voltage - Supply0.95 V ~ 1.05 V
Mounting TypeSurface MountOperating Temperature0°C ~ 85°C
Package / Case665-BBGA, FCBGACore Supply Voltage Range1V
Rohs CompliantYesLead Free Status / RoHS StatusLead free / RoHS Compliant
For Use WithHW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5Number Of Gates-
Other names122-1565  
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Performance Characteristics
This section provides the performance characteristics of some common functions and designs implemented in
Virtex-5 devices. The numbers reported here are worst-case values; they have all been fully characterized. These values are
subject to the same guidelines as the
performance.
Table 52: Register-to-Register Performance
Description
Basic Functions
16:1 Multiplexer
32:1 Multiplexer
64:1 Multiplexer
9 x 9 Logic Multiplier with 4 pipe stages
9 x 9 Logic Multiplier with 5 pipe stages
16-bit Adder
32-bit Adder
64-bit Adder
Register to LUT to Register
16-bit Counter
32-bit Counter
64-bit Counter
Memory
Cascaded block RAM (64K)
Block RAM Pipelined
Single-Port 512 x 36 bits
Single-Port 4096 x 4 bits
Dual-Port A: 4096 x 4 bits and B: 1024 x 18 bits
Distributed RAM
Single-Port 16 x 8
Single-Port 32 x 8
Single-Port 64 x 8
Dual-Port 16 x 8
Shift Register Chain
16-bit
32-bit
64-bit
DS202 (v5.3) May 5, 2010
Product Specification
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
Switching Characteristics, page
30.
Register-to-Register (with I/O Delays)
-3
550
550
511
468
550
550
550
423
550
550
550
428
500
550
550
550
550
550
550
550
550
550
www.xilinx.com
Table 52
shows internal (register-to-register)
Speed Grade
-2
-1
500
450
500
450
467
407
438
428
500
428
500
450
500
447
377
323
500
450
500
450
500
450
381
333
450
400
500
450
500
450
500
450
500
450
500
450
500
450
500
450
500
450
500
438
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
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