FPGA, VIRTEX-5 LXT, 50K, 665FCBGA

XC5VLX50T-1FFG665C

Manufacturer Part NumberXC5VLX50T-1FFG665C
DescriptionFPGA, VIRTEX-5 LXT, 50K, 665FCBGA
ManufacturerXilinx Inc
SeriesVirtex™-5 LXT
XC5VLX50T-1FFG665C datasheets
Product Change Notification
 


Specifications of XC5VLX50T-1FFG665C

No. Of Logic Blocks7200Family TypeVirtex-5
No. Of Speed Grades1Total Ram Bits2211840
No. Of I/o's360Clock ManagementDCM, PLL
I/o Supply Voltage3.3VOperating Frequency Max550MHz
Number Of Logic Elements/cells46080Number Of Labs/clbs3600
Number Of I /o360Voltage - Supply0.95 V ~ 1.05 V
Mounting TypeSurface MountOperating Temperature0°C ~ 85°C
Package / Case665-BBGA, FCBGACore Supply Voltage Range1V
Rohs CompliantYesLead Free Status / RoHS StatusLead free / RoHS Compliant
For Use WithHW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5Number Of Gates-
Other names122-1565  
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Table 59: Output Delay Measurement Methodology (Cont’d)
Description
HSTL, Class IV
HSTL, Class I, 1.8V
HSTL, Class II, 1.8V
HSTL, Class III, 1.8V
HSTL, Class IV, 1.8V
SSTL (Stub Series Terminated Logic), Class I, 1.8V
SSTL, Class II, 1.8V
SSTL, Class I, 2.5V
SSTL, Class II, 2.5V
LVDS (Low-Voltage Differential Signaling), 2.5V
LVDSEXT (LVDS Extended Mode), 2.5V
BLVDS (Bus LVDS), 2.5V
LDT (HyperTransport), 2.5V
LVPECL (Low-Voltage Positive Emitter-Coupled Logic),
2.5V
LVDCI/HSLVDCI
(Low-Voltage Digitally Controlled Impedance), 3.3V
LVDCI/HSLVDCI, 2.5V
LVDCI/HSLVDCI, 1.8V
LVDCI/HSLVDCI, 1.5V
HSTL (High-Speed Transceiver Logic), Class I & II, with DCI HSTL_I_DCI, HSTL_II_DCI
HSTL, Class III & IV, with DCI
HSTL, Class I & II, 1.8V, with DCI
HSTL, Class III & IV, 1.8V, with DCI
SSTL (Stub Series Termi.Logic), Class I & II, 1.8V, with DCI SSTL18_I_DCI, SSTL18_II_DCI
SSTL, Class I & II, 2.5V, with DCI
GTL (Gunning Transceiver Logic) with DCI
GTL Plus with DCI
Notes:
1.
C
is the capacitance of the probe, nominally 0 pF.
REF
2.
Per PCI specifications.
3.
Per PCI-X specifications.
4.
The value given is the differential input voltage.
DS202 (v5.3) May 5, 2010
Product Specification
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
I/O Standard
Attribute
HSTL_IV
HSTL_I_18
HSTL_II_18
HSTL_III_18
HSTL_IV_18
SSTL18_I
SSTL18_II
SSTL2_I
SSTL2_II
LVDS_25
LVDS_25
BLVDS_25
LDT_25
LVPECL_25
LVDCI_33, HSLVDCI_33
LVDCI_25, HSLVDCI_25
LVDCI_18, HSLVDCI_18
LVDCI_15, HSLVDCI_15
HSTL_III_DCI, HSTL_IV_DCI
HSTL_I_DCI_18, HSTL_II_DCI_18
HSTL_III_DCI_18,
HSTL_IV_DCI_18
SSTL2_I_DCI, SSTL2_II_DCI
GTL_DCI
GTLP_DCI
www.xilinx.com
(1)
R
C
V
V
REF
REF
MEAS
REF
(Ω)
(pF)
(V)
(V)
25
0
0.9
1.5
50
0
V
0.9
REF
25
0
V
0.9
REF
50
0
1.1
1.8
25
0
1.1
1.8
50
0
V
0.9
REF
25
0
V
0.9
REF
50
0
V
1.25
REF
25
0
V
1.25
REF
(4)
100
0
0
1.2
(4)
100
0
0
1.2
(4)
100
0
0
0
(4)
100
0
0
0.6
(4)
100
0
0
0
1M
0
1.65
0
1M
0
1.25
0
1M
0
0.9
0
1M
0
0.75
0
50
0
V
0.75
REF
50
0
0.9
1.5
50
0
V
0.9
REF
50
0
1.1
1.8
50
0
V
0.9
REF
50
0
V
1.25
REF
50
0
0.8
1.2
50
0
1.0
1.5
39