FPGA, VIRTEX-5 LXT, 50K, 665FCBGA

XC5VLX50T-1FFG665C

Manufacturer Part NumberXC5VLX50T-1FFG665C
DescriptionFPGA, VIRTEX-5 LXT, 50K, 665FCBGA
ManufacturerXilinx Inc
SeriesVirtex™-5 LXT
XC5VLX50T-1FFG665C datasheets
Product Change Notification
 


Specifications of XC5VLX50T-1FFG665C

No. Of Logic Blocks7200Family TypeVirtex-5
No. Of Speed Grades1Total Ram Bits2211840
No. Of I/o's360Clock ManagementDCM, PLL
I/o Supply Voltage3.3VOperating Frequency Max550MHz
Number Of Logic Elements/cells46080Number Of Labs/clbs3600
Number Of I /o360Voltage - Supply0.95 V ~ 1.05 V
Mounting TypeSurface MountOperating Temperature0°C ~ 85°C
Package / Case665-BBGA, FCBGACore Supply Voltage Range1V
Rohs CompliantYesLead Free Status / RoHS StatusLead free / RoHS Compliant
For Use WithHW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5Number Of Gates-
Other names122-1565  
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SelectIO™ DC Input and Output Levels
Values for V
and V
are recommended input voltages. Values for I
IL
IH
operating conditions at the V
and V
OL
all standards meet their specifications. The selected standards are tested at a minimum V
V
voltage levels shown. Other standards are sample tested.
OH
Table 7: SelectIO DC Input and Output Levels
V
IL
I/O Standard
V, Min
V, Max
LVTTL
–0.3
LVCMOS33,
–0.3
LVDCI33
LVCMOS25,
–0.3
LVDCI25
LVCMOS18,
–0.3
35% V
LVDCI18
LVCMOS15,
–0.3
35% V
LVDCI15
LVCMOS12
–0.3
35% V
(5)
PCI33_3
–0.2
30% V
(5)
PCI66_3
–0.2
30% V
(5)
PCI-X
–0.2
35% V
GTLP
–0.3
V
REF
GTL
–0.3
V
REF
HSTL I_12
–0.3
V
REF
(2)
HSTL I
–0.3
V
REF
(2)
HSTL II
–0.3
V
REF
(2)
HSTL III
–0.3
V
REF
(2)
HSTL IV
–0.3
V
REF
(2)
DIFF HSTL I
–0.3
50% V
(2)
DIFF HSTL II
–0.3
50% V
SSTL2 I
–0.3
V
REF
SSTL2 II
–0.3
V
REF
DIFF SSTL2 I
–0.3
50%
V
CCO
DIFF SSTL2 II
–0.3
50%
V
CCO
SSTL18 I
–0.3
V
REF
SSTL18 II
–0.3
V
REF
DIFF SSTL18 I
–0.3
50%
V
CCO
DIFF SSTL18 II
–0.3
50%
V
CCO
Notes:
1.
Tested according to relevant specifications.
2.
Applies to both 1.5V and 1.8V HSTL.
3.
Using drive strengths of 2, 4, 6, 8, 12, 16, or 24 mA.
4.
Using drive strengths of 2, 4, 6, 8, 12, or 16 mA.
5.
For more information on PCI33_3, PCI66_3, and PCI-X, refer to UG190: Virtex-5 FPGA User Guide, Chapter 6, 3.3V I/O Design Guidelines.
6.
Supported drive strengths of 2, 4, 6, or 8 mA.
DS202 (v5.3) May 5, 2010
Product Specification
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
OL
test points. Only selected standards are tested. These are chosen to ensure that
OH
V
IH
V, Min
V, Max
0.8
2.0
3.45
0.8
2.0
3.45
0.7
1.7
V
+ 0.3
CCO
65% V
V
+ 0.3
CCO
CCO
CCO
65% V
V
+ 0.3
CCO
CCO
CCO
65% V
V
+ 0.3
CCO
CCO
CCO
50% V
V
CCO
CCO
CCO
50% V
V
CCO
CCO
CCO
50% V
V
CCO
CCO
CCO
– 0.1
V
+ 0.1
REF
– 0.05
V
+ 0.05
REF
– 0.1
V
+ 0.1
V
+ 0.3
REF
CCO
– 0.1
V
+ 0.1
V
+ 0.3
REF
CCO
– 0.1
V
+ 0.1
V
+ 0.3
REF
CCO
– 0.1
V
+ 0.1
V
+ 0.3
REF
CCO
– 0.1
V
+ 0.1
V
+ 0.3
REF
CCO
– 0.1 50% V
+ 0.1
V
+ 0.3
CCO
CCO
CCO
– 0.1 50% V
+ 0.1
V
+ 0.3
CCO
CCO
CCO
– 0.15
V
+ 0.15
V
+ 0.3
REF
CCO
– 0.15
V
+ 0.15
V
+ 0.3
REF
CCO
50%
V
+ 0.3
CCO
– 0.15
V
+ 0.15
CCO
50%
V
+ 0.3
CCO
– 0.15
V
+ 0.15
CCO
– 0.125
V
+ 0.125
V
+ 0.3
REF
CCO
– 0.125
V
+ 0.125
V
+ 0.3
REF
CCO
50%
V
+ 0.3
CCO
– 0.125
V
+ 0.125
CCO
50%
V
+ 0.3
CCO
– 0.125
V
+ 0.125
CCO
www.xilinx.com
and I
are guaranteed over the recommended
OH
with the respective V
CCO
V
V
OL
OH
V, Max
V, Min
0.4
2.4
Note(3)
0.4
V
– 0.4
Note(3)
CCO
0.4
V
– 0.4
Note(3)
CCO
0.45
V
– 0.45
Note(4)
CCO
25% V
75% V
Note(4)
CCO
CCO
25% V
75% V
Note(6)
CCO
CCO
10% V
90% V
Note(5)
CCO
CCO
10% V
90% V
Note(5)
CCO
CCO
10% V
90% V
Note(5)
CCO
CCO
0.6
N/A
0.4
N/A
25% V
75% V
CCO
CCO
0.4
V
– 0.4
CCO
0.4
V
– 0.4
CCO
0.4
V
– 0.4
CCO
0.4
V
– 0.4
CCO
V
– 0.61
V
+ 0.61
TT
TT
V
– 0.81
V
+ 0.81
TT
TT
V
– 0.47
V
+ 0.47
TT
TT
V
– 0.60
V
+ 0.60
TT
TT
and
OL
I
I
OL
OH
mA
mA
Note(3)
Note(3)
Note(3)
Note(4)
Note(4)
Note(6)
Note(5)
Note(5)
Note(5)
36
N/A
32
N/A
6.3
6.3
8
–8
16
–16
24
–8
48
–8
8.1
–8.1
16.2
–16.2
6.7
–6.7
13.4
–13.4
7