PIC16F1507-I/ML Microchip Technology, PIC16F1507-I/ML Datasheet - Page 155

3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm TUBE

PIC16F1507-I/ML

Manufacturer Part Number
PIC16F1507-I/ML
Description
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F1507-I/ML

Processor Series
PIC16
Core
PIC16F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
3.5 KB
Data Ram Size
128 B
Interface Type
ICSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-20
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1507-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16(L)F1507
19.0
The PWM module generates a Pulse-Width Modulated
signal determined by the duty cycle, period, and reso-
lution that are configured by the following registers:
• PR2
• T2CON
• PWMxDCH
• PWMxDCL
• PWMxCON
Figure 19-2
operation.
Figure 19-1
signal.
FIGURE 19-2:
DS41586A-page 155
PULSE WIDTH MODULATION
(PWM) MODULE
Note 1:
shows a simplified block diagram of PWM
shows a typical waveform of the PWM
TMR2 Module
8-bit timer is concatenated with the two Least Significant bits of 1/F
the Timer2 prescaler to create a 10-bit time base.
SIMPLIFIED PWM BLOCK DIAGRAM
PWMxDCH
Comparator
(Not visible to user)
Duty Cycle registers
TMR2
PR2
Comparator
Latched
Clear Timer,
PWMx pin and
latch Duty Cycle
(1)
Preliminary
PWMxDCL<7:6>
S
R
For a step-by-step procedure on how to set up this
module for PWM operation, refer to Section 19.1.9
“Setup for PWM Operation using PWMx Pins”.
FIGURE 19-1:
Output Polarity (PWMxPOL)
Q
Q
Pulse Width
TMR2 = 0
0
1
Period
PWMxOUT
to other peripherals: CLC and CWG
PWM OUTPUT
TMR2 =
PWM x DCH<7:0>:PWM x DCL<7:6>
 2011 Microchip Technology Inc.
OSC
Output Enable (PWMxOE)
adjusted by
TMR2 = PR2
TRIS Control
PWMx

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