PIC16F1507-I/SS Microchip Technology, PIC16F1507-I/SS Datasheet - Page 37

3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SSOP .209in TUBE

PIC16F1507-I/SS

Manufacturer Part Number
PIC16F1507-I/SS
Description
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F1507-I/SS

Processor Series
PIC16
Core
PIC16F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
3.5 KB
Data Ram Size
128 B
Interface Type
ICSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SSOP-20
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1507-I/SS
Manufacturer:
MICROCHIP
Quantity:
5 000
Part Number:
PIC16F1507-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC16F1507-I/SS
0
PIC16(L)F1507
3.5.2
The linear data memory is the region from FSR
address 0x2000 to FSR address 0x29AF. This region is
a virtual region that points back to the 80-byte blocks of
GPR memory in all the banks.
Unimplemented memory reads as 0x00. Use of the
linear data memory region allows buffers to be larger
than 80 bytes because incrementing the FSR beyond
one bank will go directly to the GPR memory of the next
bank.
The 16 bytes of common memory are not included in
the linear data memory region.
FIGURE 3-10:
DS41586A-page 37
7
0
0
FSRnH
1
Location Select
LINEAR DATA MEMORY
0
LINEAR DATA MEMORY
MAP
7
FSRnL
0x2000
0x29AF
Bank 30
Bank 0
0x06F
0x020
0x0A0
Bank 1
0x0EF
0x120
Bank 2
0xF20
0xF6F
0x16F
0
Preliminary
3.5.3
To make constant data access easier, the entire
program Flash memory is mapped to the upper half of
the FSR address space. When the MSB of FSRnH is
set, the lower 15 bits are the address in program
memory which will be accessed through INDF. Only the
lower 8 bits of each memory location is accessible via
INDF. Writing to the program Flash memory cannot be
accomplished
instructions that access program Flash memory via the
FSR/INDF interface will require one additional
instruction cycle to complete.
FIGURE 3-11:
7
1
FSRnH
Location Select
PROGRAM FLASH MEMORY
via
0
the
PROGRAM FLASH
MEMORY MAP
 2011 Microchip Technology Inc.
7
FSR/INDF
FSRnL
0x8000
0xFFFF
interface.
Program
Flash
Memory
(low 8
bits)
0x0000
0x7FFF
0
All

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