PIC16F1507T-I/ML Microchip Technology, PIC16F1507T-I/ML Datasheet - Page 104

3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm T/R

PIC16F1507T-I/ML

Manufacturer Part Number
PIC16F1507T-I/ML
Description
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm T/R
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F1507T-I/ML

Processor Series
PIC16
Core
PIC16F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
3.5 KB
Data Ram Size
128 B
Interface Type
ICSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-20
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Lead Free Status / Rohs Status
 Details
REGISTER 11-6:
TABLE 11-3:
TABLE 11-4:
 2011 Microchip Technology Inc.
CONFIG1
Legend:
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5-0
Note 1:
ANSELA
APFCON
LATA
OPTION_REG
PORTA
TRISA
WPUA
Legend:
Note 1:
Name
Name
U-0
2:
3:
— = unimplemented location, read as ‘ 0 ’. Shaded cells are not used by PORTA.
Global WPUEN bit of the OPTION_REG register must be cleared for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in configured as an output.
For the WPUA3 bit, when MCLRE = 1, weak pull-up is internally enabled, but not reported here.
x = unknown, u = unchanged, – = unimplemented locations read as ‘ 0 ’. Shaded cells are not used by PORTA.
Unimplemented, read as ‘ 1 ’.
13:8
Bits
7:0
Unimplemented: Read as ‘0’
WPUA<5:0>: Weak Pull-up Register bits
1 = Pull-up enabled
0 = Pull-up disabled
WPUEN
SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
SUMMARY OF CONFIGURATION WORD WITH PORTA
Bit 7
Bit -/7
U-0
CP
WPUA: WEAK PULL-UP PORTA REGISTER
INTEDG
Bit 6
MCLRE
Bit -/6
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-1/1
WPUA5
TMR0CS
TRISA5
WPUA5
LATA5
PWRTE
Bit 13/5
Bit 5
RA5
R/W-1/1
WPUA4
Preliminary
TMR0SE
TRISA4
WPUA4
ANSA4
LATA4
Bit 12/4
Bit 4
RA4
(3)
WDTE<1:0>
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-1/1
WPUA3
CLKOUTEN
WPUA3
Bit 11/3
Bit 3
PSA
RA3
(1)
TRISA2
WPUA2
ANSA2
LATA2
Bit 10/2
R/W-1/1
WPUA2
Bit 2
RA2
PIC16(L)F1507
BOREN<1:0>
CLC1SEL
PS<2:0>
TRISA1
WPUA1
ANSA1
LATA1
Bit 9/1
Bit 1
RA1
FOSC<1:0>
R/W-1/1
WPUA1
NCO1SEL
TRISA0
WPUA0
ANSA0
DS41586A-page 104
LATA0
Bit 8/0
Bit 0
RA0
R/W-1/1
WPUA0
Register
on Page
Register
on Page
103
100
103
137
102
102
104
40
bit 0

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