PIC16F1829-E/P Microchip Technology, PIC16F1829-E/P Datasheet - Page 135

14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 P

PIC16F1829-E/P

Manufacturer Part Number
PIC16F1829-E/P
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 P
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet

Specifications of PIC16F1829-E/P

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Processor Series
PIC16F182x
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
18
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REGISTER 12-9:
REGISTER 12-10: TRISB: PORTB TRI-STATE REGISTER
REGISTER 12-11: LATB: PORTB DATA LATCH REGISTER
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-4
bit 3-0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-4
bit 3-0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-4
bit 3-0
Note 1:
R/W-x/u
R/W-1/1
R/W-x/u
TRISB7
LATB7
RB7
Writes to PORTB are actually written to corresponding LATB register. Reads from PORTB register is
return of actual I/O pin values.
RB<7:4>: PORTB General Purpose I/O Pin bits
1 = Port pin is > V
0 = Port pin is < V
Unimplemented: Read as ‘0’
TRISB<7:4>: PORTB Tri-State Control bits
1 = PORTB pin configured as an input (tri-stated)
0 = PORTB pin configured as an output
Unimplemented: Read as ‘0’
LATB<7:4>: PORTB Output Latch Value bits
Unimplemented: Read as ‘0’
R/W-x/u
R/W-1/1
R/W-x/u
TRISB6
LATB6
RB6
PORTB: PORTB REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-1/1
R/W-x/u
TRISB5
R/W-x/u
LATB5
IH
IL
RB5
R/W-x/u
R/W-1/1
R/W-x/u
TRISB4
LATB4
RB4
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
(1)
U-0
U-0
U-0
PIC16F/LF1825/1829
U-0
U-0
U-0
U-0
U-0
U-0
DS41440A-page 135
U-0
U-0
U-0
bit 0
bit 0
bit 0

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