PIC16F1829-E/P Microchip Technology, PIC16F1829-E/P Datasheet - Page 30

• Manufacturer Part Number: PIC16F1829-E/P
• Description: 14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 P
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ mTouch™ 16Fr

Specifications of PIC16F1829-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: *
• Processor Series: PIC16F182x
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 3-5:
Legend:
80Ah
80Bh
80Ch
80Dh
80Eh
81Ah
81Bh
81Ch
81Dh
81Eh
800h
801h
802h
803h
804h
805h
806h
807h
808h
809h
80Fh
810h
811h
812h
813h
814h
815h
816h
817h
818h
819h
81Fh
820h
86Fh
870h
87Fh
Unimplemented
Read as ‘0’
BANK 16
70h – 7Fh
Accesses
STATUS
PCLATH
INTCON
FSR0L
FSR0H
FSR1L
FSR1H
WREG
INDF0
INDF1
BSR
PCL
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
= Unimplemented data memory locations, read as ‘0’.
PIC16F/LF1825/1829 MEMORY MAP, BANKS 16-23
88Ah
88Bh
88Ch
88Dh
88Eh
89Ah
89Bh
89Ch
89Dh
89Eh
8A0h
8EFh
8FFh
880h
881h
882h
883h
884h
885h
886h
887h
888h
889h
88Fh
890h
891h
892h
893h
894h
895h
896h
897h
898h
899h
89Fh
8F0h
Unimplemented
BANK 17
Read as ‘0’
70h – 7Fh
Accesses
STATUS
PCLATH
INTCON
FSR0L
FSR0H
FSR1L
FSR1H
WREG
INDF0
INDF1
BSR
PCL
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
90Ah
90Bh
90Ch
90Dh
90Eh
91Ah
91Bh
91Ch
91Dh
91Eh
97Fh
900h
901h
902h
903h
904h
905h
906h
907h
908h
909h
90Fh
910h
911h
912h
913h
914h
915h
916h
917h
918h
919h
91Fh
920h
96Fh
970h
Unimplemented
BANK 18
Read as ‘0’
70h – 7Fh
Accesses
STATUS
PCLATH
INTCON
FSR0L
FSR0H
FSR1L
FSR1H
WREG
INDF0
INDF1
PCL
BSR
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
98Ah
98Bh
98Ch
98Dh
98Eh
98Fh
99Ah
99Bh
99Ch
99Dh
99Eh
99Fh
9A0h
9EFh
9F0h
9FFh
980h
981h
982h
983h
984h
985h
986h
987h
988h
989h
990h
991h
992h
993h
994h
995h
996h
997h
998h
999h
Unimplemented
Read as ‘0’
BANK 19
70h – 7Fh
Accesses
STATUS
PCLATH
INTCON
FSR0H
FSR1H
FSR0L
FSR1L
WREG
INDF0
INDF1
PCL
BSR
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
A0Ch
A0Dh
A1Ch
A1Dh
A00h
A01h
A02h
A03h
A04h
A05h
A06h
A07h
A08h
A09h
A0Ah
A0Bh
A0Eh
A0Fh
A10h
A11h
A12h
A13h
A14h
A15h
A16h
A17h
A18h
A19h
A1Ah
A1Bh
A1Eh
A1Fh
A20h
A6Fh
A70h
A7Fh
Unimplemented
Read as ‘0’
BANK 20
70h – 7Fh
Accesses
STATUS
PCLATH
INTCON
FSR0H
FSR1H
FSR0L
FSR1L
WREG
INDF0
INDF1
PCL
BSR
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
A8Ah
A8Bh
A8Ch
A8Dh
A8Eh
A9Ah
A9Bh
A9Ch
A9Dh
A9Eh
AA0h
AEFh
AFFh
A80h
A81h
A82h
A83h
A84h
A85h
A86h
A87h
A88h
A89h
A8Fh
A90h
A91h
A92h
A93h
A94h
A95h
A96h
A97h
A98h
A99h
A9Fh
AF0h
Unimplemented
Read as ‘0’
BANK 21
70h – 7Fh
Accesses
STATUS
PCLATH
INTCON
FSR0H
FSR1H
FSR0L
FSR1L
WREG
INDF0
INDF1
PCL
BSR
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
B0Ah
B0Bh
B0Ch
B0Dh
B0Eh
B1Ah
B1Bh
B1Ch
B1Dh
B1Eh
B00h
B01h
B02h
B03h
B04h
B05h
B06h
B07h
B08h
B09h
B0Fh
B10h
B11h
B12h
B13h
B14h
B15h
B16h
B17h
B18h
B19h
B1Fh
B20h
B6Fh
B70h
B7Fh
Unimplemented
Read as ‘0’
BANK 22
70h – 7Fh
Accesses
STATUS
PCLATH
INTCON
FSR0H
FSR1H
FSR0L
FSR1L
WREG
INDF0
INDF1
PCL
BSR
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
B8Ah
B8Bh
B8Ch
B8Dh
B8Eh
B9Ah
B9Bh
B9Ch
B9Dh
B9Eh
BA0h
BEFh
BFFh
B80h
B81h
B82h
B83h
B84h
B85h
B86h
B87h
B88h
B89h
B8Fh
B90h
B91h
B92h
B93h
B94h
B95h
B96h
B97h
B98h
B99h
B9Fh
BF0h
Unimplemented
Read as ‘0’
BANK 23
70h – 7Fh
Accesses
STATUS
PCLATH
INTCON
FSR0H
FSR1H
FSR0L
FSR1L
WREG
INDF0
INDF1
BSR
PCL
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—