PIC16F1829-E/P Microchip Technology, PIC16F1829-E/P Datasheet - Page 31

• Manufacturer Part Number: PIC16F1829-E/P
• Description: 14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 P
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ mTouch™ 16Fr

Specifications of PIC16F1829-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: *
• Processor Series: PIC16F182x
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 3-6:
Legend:
C00h
C01h
C02h
C03h
C04h
C05h
C06h
C07h
C08h
C09h
C0Ah
C0Bh
C0Ch
C0Dh
C0Eh
C0Fh
C10h
C11h
C12h
C13h
C14h
C15h
C16h
C17h
C18h
C19h
C1Ah
C1Bh
C1Ch
C1Dh
C1Eh
C1Fh
C20h
C6Fh
C70h
CFFh
Unimplemented
Read as ‘0’
BANK 24
70h – 7Fh
Accesses
STATUS
PCLATH
INTCON
FSR0L
FSR0H
FSR1L
FSR1H
WREG
INDF0
INDF1
BSR
PCL
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
= Unimplemented data memory locations, read as ‘0’.
PIC16F/LF1825/1829 MEMORY MAP, BANKS 24-31
C8Ch
C8Dh
C9Ch
C9Dh
CEFh
C80h
C81h
C82h
C83h
C84h
C85h
C86h
C87h
C88h
C89h
C8Ah
C8Bh
C8Eh
C8Fh
C90h
C91h
C92h
C93h
C94h
C95h
C96h
C97h
C98h
C99h
C9Ah
C9Bh
C9Eh
C9Fh
CA0h
CF0h
CFFh
Unimplemented
BANK 25
Read as ‘0’
70h – 7Fh
Accesses
STATUS
PCLATH
INTCON
FSR0L
FSR0H
FSR1L
FSR1H
WREG
INDF0
INDF1
PCL
BSR
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
D0Bh
D0Ch
D0Dh
D1Ch
D1Dh
D00h
D01h
D02h
D03h
D04h
D05h
D06h
D07h
D08h
D09h
D0Ah
D0Eh
D0Fh
D10h
D11h
D12h
D13h
D14h
D15h
D16h
D17h
D18h
D19h
D1Ah
D1Bh
D1Eh
D1Fh
D20h
D6Fh
D70h
D7Fh
Unimplemented
BANK 26
Read as ‘0’
70h – 7Fh
Accesses
STATUS
PCLATH
INTCON
FSR0L
FSR0H
FSR1L
FSR1H
WREG
INDF0
INDF1
PCL
BSR
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
D8Ah
D8Bh
D8Ch
D8Dh
D8Eh
D9Ah
D9Bh
D9Ch
D9Dh
D9Eh
DA0h
DEFh
DFFh
D80h
D81h
D82h
D83h
D84h
D85h
D86h
D87h
D88h
D89h
D8Fh
D90h
D91h
D92h
D93h
D94h
D95h
D96h
D97h
D98h
D99h
D9Fh
DF0h
Unimplemented
BANK 27
Read as ‘0’
70h – 7Fh
Accesses
STATUS
PCLATH
INTCON
FSR0H
FSR1H
FSR0L
FSR1L
WREG
INDF0
INDF1
PCL
BSR
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
E0Ch
E0Dh
E1Ch
E1Dh
E00h
E01h
E02h
E03h
E04h
E05h
E06h
E07h
E08h
E09h
E0Ah
E0Bh
E0Eh
E0Fh
E10h
E11h
E12h
E13h
E14h
E15h
E16h
E17h
E18h
E19h
E1Ah
E1Bh
E1Eh
E1Fh
E20h
E6Fh
E70h
E7Fh
Unimplemented
Read as ‘0’
BANK 28
70h – 7Fh
Accesses
STATUS
PCLATH
INTCON
FSR0H
FSR1H
FSR0L
FSR1L
WREG
INDF0
INDF1
PCL
BSR
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
E8Bh
E8Ch
E8Dh
E9Ch
E9Dh
EEFh
E80h
E81h
E82h
E83h
E84h
E85h
E86h
E87h
E88h
E89h
E8Ah
E8Eh
E8Fh
E90h
E91h
E92h
E93h
E94h
E95h
E96h
E97h
E98h
E99h
E9Ah
E9Bh
E9Eh
E9Fh
EA0h
EF0h
EFFh
Unimplemented
Read as ‘0’
BANK 29
70h – 7Fh
Accesses
STATUS
PCLATH
INTCON
FSR0H
FSR1H
FSR0L
FSR1L
WREG
INDF0
INDF1
PCL
BSR
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
F0Ch
F0Dh
F1Ch
F1Dh
F00h
F01h
F02h
F03h
F04h
F05h
F06h
F07h
F08h
F09h
F0Ah
F0Bh
F0Eh
F0Fh
F10h
F11h
F12h
F13h
F14h
F15h
F16h
F17h
F18h
F19h
F1Ah
F1Bh
F1Eh
F1Fh
F20h
F6Fh
F70h
F7Fh
Unimplemented
Read as ‘0’
BANK 30
70h – 7Fh
Accesses
STATUS
PCLATH
INTCON
FSR0H
FSR1H
FSR0L
FSR1L
WREG
INDF0
INDF1
PCL
BSR
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
F8Ch
F8Dh
F9Ch
F9Dh
FEFh
F80h
F81h
F82h
F83h
F84h
F85h
F86h
F87h
F88h
F89h
F8Ah
F8Bh
F8Eh
F8Fh
F90h
F91h
F92h
F93h
F94h
F95h
F96h
F97h
F98h
F99h
F9Ah
F9Bh
F9Eh
F9Fh
FA0h
FF0h
FFFh
See
register mapping
BANK 31
70h – 7Fh
Accesses
STATUS
PCLATH
INTCON
Table 3-7
FSR0H
FSR1H
FSR0L
FSR1L
WREG
INDF0
INDF1
details
BSR
PCL
for