PIC16F1829-E/P Microchip Technology, PIC16F1829-E/P Datasheet - Page 347

• Manufacturer Part Number: PIC16F1829-E/P
• Description: 14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 P
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ mTouch™ 16Fr

Specifications of PIC16F1829-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: *
• Processor Series: PIC16F182x
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MOVWI
Syntax:
Operands:
Operation:
Status Affected:
Description:
 2010 Microchip Technology Inc.
Mode
Preincrement
Predecrement
Postincrement
Postdecrement
Move W to INDFn
[ label ] MOVWI ++FSRn
[ label ] MOVWI --FSRn
[ label ] MOVWI FSRn++
[ label ] MOVWI FSRn--
[ label ] MOVWI k[FSRn]
n  [0,1]
mm  [00,01, 10, 11]
-32  k  31
W  INDFn
Effective address is determined by
• FSR + 1 (preincrement)
• FSR - 1 (predecrement)
• FSR + k (relative offset)
After the Move, the FSR value will be
either:
• FSR + 1 (all increments)
• FSR - 1 (all decrements)
Unchanged
This instruction is used to move data
between W and one of the indirect
registers (INDFn). Before/after this
move, the pointer (FSRn) is updated by
pre/post incrementing/decrementing it.
Note: The INDFn registers are not
physical registers. Any instruction that
accesses an INDFn register actually
accesses the register at the address
specified by the FSRn.
FSRn is limited to the range 0000h -
FFFFh. Incrementing/decrementing it
beyond these bounds will cause it to wrap
around.
The increment/decrement operation on
FSRn WILL NOT affect any Status bits.
None
Syntax
FSRn++
FSRn--
++FSRn
--FSRn
mm
00
01
10
11
Preliminary
NOP
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
OPTION
Syntax:
Operands:
Operation:
Status Affected:
Description:
RESET
Syntax:
Operands:
Operation:
Status Affected:
Description:
PIC16F/LF1825/1829
Load OPTION_REG Register
with W
[ label ] OPTION
None
(W)  OPTION_REG
None
Move data from W register to
OPTION_REG register.
Software Reset
[ label ] RESET
None
Execute a device Reset. Resets the
nRI flag of the PCON register.
None
This instruction provides a way to
execute a hardware Reset by soft-
ware.
No Operation
[ label ]
None
No operation
None
No operation.
1
1
NOP
NOP
DS41440A-page 349