PIC16F1829-E/P Microchip Technology, PIC16F1829-E/P Datasheet - Page 54

14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 P

PIC16F1829-E/P

Manufacturer Part Number
PIC16F1829-E/P
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 P
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet

Specifications of PIC16F1829-E/P

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Processor Series
PIC16F182x
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
18
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F/LF1825/1829
REGISTER 4-2:
DS41440A-page 54
bit 13
bit 6
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7-5
bit 4
bit 3-2
bit 1-0
Note 1:
R/P-1/1
LVP
U-1
2:
The LVP bit cannot be programmed to ‘0’ when Programming mode is entered via LVP.
The DEBUG bit in Configuration Word is managed automatically by device development tools including debuggers and
programmers. For normal device operation, this bit should be maintained as a ‘1’.
LVP: Low-Voltage Programming Enable bit
1 = Low-voltage programming enabled
0 = High-voltage on MCLR must be used for programming
DEBUG: In-Circuit Debugger Mode bit
1 = In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins
0 = In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger
Unimplemented: Read as ‘1’
BORV: Brown-out Reset Voltage Selection bit
1 = Brown-out Reset voltage set to 1.9V (typical)
0 = Brown-out Reset voltage set to 2.5V (typical)
STVREN: Stack Overflow/Underflow Reset Enable bit
1 = Stack Overflow or Underflow will cause a Reset
0 = Stack Overflow or Underflow will not cause a Reset
PLLEN: PLL Enable bit
1 = 4xPLL enabled
0 = 4xPLL disabled
Unimplemented: Read as ‘1’
Reserved: This location should be programmed to a ‘1’.
Unimplemented: Read as ‘1’
WRT<1:0>: Flash Memory Self-Write Protection bits
11 = Write protection off
10 = 000h to 1FFh write-protected, 200h to 7FFh may be modified by EECON control
01 = 000h to 3FFh write-protected, 400h to 7FFh may be modified by EECON control
00 = 000h to 7FFh write-protected, no addresses may be modified by EECON control
DEBUG
R/P-1/1
CONFIGURATION WORD 2
U-1
(2)
W = Writable bit
‘0’ = Bit is cleared
x = Bit is unknown
Reserved
U-1
R-1
Preliminary
R/P-1/1
(1)
BORV
U-1
U = Unimplemented bit, read as ‘1’
-n/n = Value at POR and BOR/Value at all other Resets
P = Programmable bit
STVREN
R/P-1/1
U-1
 2010 Microchip Technology Inc.
R/P-1/1
R/P-1/1
PLLEN
WRT1
R/P-1/1
WRT0
U-1
bit 7
bit 0

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