PIC16LF1507-E/ML Microchip Technology, PIC16LF1507-E/ML Datasheet - Page 160

3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm TUBE

PIC16LF1507-E/ML

Manufacturer Part Number
PIC16LF1507-E/ML
Description
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet

Specifications of PIC16LF1507-E/ML

Processor Series
PIC16
Core
PIC16F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
3.5 KB
Data Ram Size
128 B
Interface Type
ICSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
QFN-20
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
REGISTER 19-2:
REGISTER 19-3:
TABLE 19-3:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5-0
PR2
PWM1CON
PWM1DCH
PWM1DCL
PWM2CON
PWM2DCH
PWM2DCL
PWM3CON
PWM3DCH
PWM3DCL
PWM4CON
PWM4DCH
PWM4DCL
T2CON
TMR2
TRISA
TRISC
Legend:
Note
R/W-x/u
R/W-x/u
Name
PWMxDCL<7:6>
1:
*
Page provides register information.
Unimplemented, read as ‘1’.
- = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the PWM.
PWM1EN
PWM2EN
PWM3EN
PWM4EN
PWMxDCH<7:0>: PWM Duty Cycle Most Significant bits
These bits are the MSbs of the PWM duty cycle. The two LSbs are found in the PWMxDCL register.
TRISC7
PWMxDCL<7:6>: PWM Duty Cycle Least Significant bits
These bits are the LSbs of the PWM duty cycle. The MSbs are found in the PWMxDCH register.
Unimplemented: Read as ‘0’
Bit 7
R/W-x/u
SUMMARY OF REGISTERS ASSOCIATED WITH PWM
PWM1DCL<7:6>
PWM2DCL<7:6>
PWM3DCL<7:6>
PWM4DCL<7:6>
R/W-x/u
PWMxDCH: PWM DUTY CYCLE HIGH BITS
PWMxDCL: PWM DUTY CYCLE LOW BITS
PWM1OE
PWM2OE
PWM3OE
PWM4OE
TRISC6
Bit 6
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-x/u
U-0
PWM1OUT
PWM2OUT
PWM3OUT
PWM4OUT
TRISC5
TRISA5
Bit 5
T2OUTPS<3:0>
R/W-x/u
Timer2 module Period Register
PWMxDCH<7:0>
PWM1POL
PWM2POL
PWM3POL
PWM4POL
U-0
Timer2 module Register
Preliminary
TRISA4
TRISC4
Bit 4
PWM1DCH<7:0>
PWM2DCH<7:0>
PWM3DCH<7:0>
PWM4DCH<7:0>
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-x/u
TRISC3
U-0
Bit 3
—(1)
TMR2ON
TRISA2
TRISC2
Bit 2
R/W-x/u
U-0
PIC16(L)F1507
TRISA1
TRISC1
Bit 1
T2CKPS<1:0>
R/W-x/u
U-0
TRISC0
TRISA0
DS41586A-page 160
Bit 0
R/W-x/u
U-0
Register
on Page
151*
151*
159
160
160
160
160
160
159
160
160
159
160
160
153
102
109
bit 0
bit 0

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