PIC16LF1507-E/P Microchip Technology, PIC16LF1507-E/P Datasheet - Page 123

3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 PDIP .300in TUBE

PIC16LF1507-E/P

Manufacturer Part Number
PIC16LF1507-E/P
Description
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 PDIP .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet

Specifications of PIC16LF1507-E/P

Processor Series
PIC16
Core
PIC16F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
3.5 KB
Data Ram Size
128 B
Interface Type
ICSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Package / Case
PDIP-20
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
PIC16(L)F1507
TABLE 15-1:
FIGURE 15-2:
DS41586A-page 123
Legend:
Note 1:
Clock Source
ADC Clock Period (T
Fosc/16
Fosc/32
Fosc/64
Fosc/2
Fosc/4
Fosc/8
ADC
F
RC
2:
3:
4:
T
CY
Set GO bit
Holding capacitor is disconnected from analog input (typically 100 ns)
Shaded cells are outside of recommended range.
The F
These values violate the minimum required T
For faster conversion times, the selection of another clock source is recommended.
The ADC clock period (T
system clock F
device in Sleep mode.
- T
AD
ADCS<2:0>
Conversion starts
RC
ADC CLOCK PERIOD (T
T
AD
000
100
001
101
010
110
x11
source has a typical T
1 T
AD
ANALOG-TO-DIGITAL CONVERSION T
)
OSC
AD
b9
. However, the F
2 T
1.0-6.0  s
AD
100 ns
200 ns
400 ns
AD
b8
20 MHz
800 ns
1.6  s
3.2  s
3 T
) and total ADC conversion time can be minimized when the ADC clock is derived from the
(2)
(2)
(2)
AD
AD
(1,4)
b7
time of 1.6  s for V
4 T
RC
clock source must be used when conversions are to be performed with the
AD
AD
b6
1.0-6.0  s
5 T
) V
On the following cycle:
ADRESH:ADRESL is loaded, GO bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
Preliminary
125 ns
250 ns
0.5  s
16 MHz
AD
1.0  s
2.0  s
4.0  s
S
AD
b5
. DEVICE OPERATING FREQUENCIES
time.
6 T
(2)
(2)
(2)
(1,4)
DD
AD
b4
Device Frequency (F
.
7 T
AD
1.0-6.0  s
b3
AD
250 ns
500 ns
8
8.0  s
8 MHz
1.0  s
2.0  s
4.0  s
CYCLES
T
AD
b2
(3)
(2)
(2)
(1,4)
9 T
AD
OSC
b1
10
)
1.0-6.0  s
T
AD
16.0  s
500 ns
b0
8.0  s
 2011 Microchip Technology Inc.
4 MHz
1.0  s
2.0  s
4.0  s
11
(3)
(2)
(3)
(1,4)
1.0-6.0  s
16.0  s
32.0  s
64.0  s
8.0  s
1 MHz
2.0  s
4.0  s
(3)
(3)
(3)
(3)
(1,4)

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