PIC24F16KA101-E/MQ Microchip Technology, PIC24F16KA101-E/MQ Datasheet - Page 181

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PIC24F16KA101-E/MQ

Manufacturer Part Number
PIC24F16KA101-E/MQ
Description
16KB Flash, 1.5KB RAM, 512B EEPROM, 16 MIPS, 18 I/O,16-bit PIC24F Family, NanoWa
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheet

Specifications of PIC24F16KA101-E/MQ

Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
16KB (5.5K x 24)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
23.0
The comparator module provides two dual input
comparators. The inputs to the comparator can be
configured to use any one of four external analog
inputs, as well as a voltage reference input from either
the internal band gap reference divided by 2 (V
the comparator voltage reference generator.
FIGURE 23-1:
© 2009 Microchip Technology Inc.
Note:
CCH<1:0>
CREF
C
C
C
V
C
CV
X
X
X
BG
X
COMPARATOR MODULE
INB
INC
IND
INA
REF
/2
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information on the
Comparator module, refer to the “PIC24F
Family Reference Manual”, Section 19.
“Comparator Module” (DS39710).
COMPARATOR MODULE BLOCK DIAGRAM
Select
Logic
Input
V
V
V
V
IN
IN
IN
IN
-
+
-
+
C1
C2
BG
/2) or
Preliminary
PIC24F16KA102 FAMILY
EVPOL<1:0>
EVPOL<1:0>
CPOL
CPOL
The comparator outputs may be directly connected to
the CxOUT pins. When the respective COE equals ‘1’,
the I/O pad logic makes the unsynchronized output of
the comparator available on the pin.
A simplified block diagram of the module is displayed in
Figure 23-1. Diagrams of the possible individual
comparator
Figure 23-2.
Each comparator has its own control register,
CMxCON (Register 23-1), for enabling and configuring
its operation. The output and event status of all three
comparators is provided in the CMSTAT register
(Register 23-2).
Trigger/Interrupt
Trigger/Interrupt
Logic
Logic
configurations
COE
COE
CEVT
CEVT
COUT
COUT
are
DS39927B-page 179
C1OUT
C2OUT
displayed
Pin
Pin
in

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