PIC24F16KA101-E/P Microchip Technology, PIC24F16KA101-E/P Datasheet - Page 128

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PIC24F16KA101-E/P

Manufacturer Part Number
PIC24F16KA101-E/P
Description
16KB Flash, 1.5KB RAM, 512B EEPROM, 16 MIPS, 18 I/O,16-bit PIC24F Family, NanoWa
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheet

Specifications of PIC24F16KA101-E/P

Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
16KB (5.5K x 24)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC24F16KA102 FAMILY
REGISTER 15-2:
DS39927B-page 126
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-5
bit 3
bit 0
Note 1:
U-0
U-0
2:
3:
4:
To enable the actual RTCC output, the RTCOE (RCFGCAL) bit needs to be set.
To enable the actual OC1 output, the OCPWM1 module has to be enabled.
Bit 4 is described in Section 17.0 “Inter-Integrated Circuit (I
Bits 2 and 1 are described in Section 19.0 Real-Time Clock and Calendar (RTCC).
Unimplemented: Read as ‘0’
OC1TRIS: OC1 Output Tri-State Select bit
1 = OC1 output will not be active on the pin; OCPWM1 can still be used for internal triggers
0 = OC1 output will be active on the pin based on the OCPWM1 module settings
Unimplemented: Read as ‘0’
U-0
U-0
PADCFG1: PAD CONFIGURATION CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
U-0
SMBUSDEL
R/W-0
U-0
Preliminary
(3)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
OC1TRIS
R/W-0
U-0
RTSECSEL1
2
R/W-0
C™)”.
U-0
(1,4)
x = Bit is unknown
© 2009 Microchip Technology Inc.
RTSECSEL0
R/W-0
U-0
(1,4)
R/W-0
U-0
bit 8
bit 0

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