PIC24FJ256DA210T-I/BG Microchip Technology, PIC24FJ256DA210T-I/BG Datasheet - Page 15

• Manufacturer Part Number: PIC24FJ256DA210T-I/BG
• Description: 16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256DA210T-I/BG

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 121-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.0
This document contains device-specific information for
the following devices:
The PIC24FJ256DA210 family enhances on the exist-
ing line of Microchip‘s 16-bit microcontrollers, adding a
new Graphics Controller (GFX) module to interface
with a graphical LCD display and also adds large data
RAM, up to 96 Kbytes. The PIC24FJ256DA210 family
allows the CPU to fetch data directly from an external
memory device using the EPMP module.
1.1
1.1.1
Central to all PIC24F devices is the 16-bit modified
Harvard architecture, first introduced with Microchip’s
dsPIC
CPU core offers a wide range of enhancements, such
as:
• 16-bit data and 24-bit address paths with the
• Linear addressing of up to 12 Mbytes (program
• A 16-element working register array with built-in
• A 17 x 17 hardware multiplier with support for
• Hardware support for 32 by 16-bit division
• An instruction set that supports multiple
• Operational performance up to 16 MIPS
1.1.2
All of the devices in the PIC24FJ256DA210 family
incorporate a range of features that can significantly
reduce power consumption during operation. Key
items include:
• On-the-Fly Clock Switching: The device clock
 2010 Microchip Technology Inc.
• PIC24FJ128DA106
• PIC24FJ256DA106
• PIC24FJ128DA110
• PIC24FJ256DA110
ability to move information between data and
memory spaces
space) and 32 Kbytes (data)
software stack support
integer math
addressing modes and is optimized for high-level
languages, such as ‘C’
can be changed under software control to the
Timer1 source or the internal, low-power RC
oscillator during operation, allowing the user to
incorporate power-saving ideas into their software
designs.
®
Digital Signal Controllers (DSCs). The PIC24F
DEVICE OVERVIEW
Core Features
16-BIT ARCHITECTURE
POWER-SAVING TECHNOLOGY
• PIC24FJ128DA206
• PIC24FJ256DA206
• PIC24FJ128DA210
• PIC24FJ256DA210
PIC24FJ256DA210 FAMILY
• Doze Mode Operation: When timing-sensitive
• Instruction-Based Power-Saving Modes: The
1.1.3
All of the devices in the PIC24FJ256DA210 family offer
five different oscillator options, allowing users a range
of choices in developing application hardware. These
include:
• Two Crystal modes using crystals or ceramic
• Two External Clock modes offering the option of a
• A Fast Internal Oscillator (FRC) with a nominal
• A Phase Lock Loop (PLL) frequency multiplier,
• A separate Low-Power Internal RC Oscillator
The internal oscillator block also provides a stable
reference source for the Fail-Safe Clock Monitor
(FSCM). This option constantly monitors the main clock
source against a reference signal provided by the inter-
nal oscillator and enables the controller to switch to the
internal oscillator, allowing for continued low-speed
operation or a safe application shutdown.
1.1.4
Regardless of the memory size, all devices share the
same rich set of peripherals, allowing for a smooth
migration path as applications grow and evolve. The
consistent pinout scheme used throughout the entire
family also aids in migrating from one device to the next
larger, or even in jumping from 64-pin to 100-pin
devices.
The PIC24F family is pin compatible with devices in the
dsPIC33 family, and shares some compatibility with the
pinout schema for PIC18 and dsPIC30. This extends
the ability of applications to grow from the relatively
simple, to the powerful and complex, yet still selecting
a Microchip device.
applications, such as serial communications,
require the uninterrupted operation of peripherals,
the CPU clock speed can be selectively reduced,
allowing incremental power savings without
missing a beat.
microcontroller can suspend all operations, or
selectively shut down its core while leaving its
peripherals active with a single instruction in
software.
resonators.
divide-by-2 clock output.
8 MHz output, which can also be divided under
software control to provide clock speeds as low as
31 kHz.
available to the external oscillator modes and the
FRC oscillator, which allows clock speeds of up to
32 MHz.
(LPRC) with a fixed 31 kHz output, which provides
a low-power option for timing-insensitive
applications.
OSCILLATOR OPTIONS AND
FEATURES
EASY MIGRATION
DS39969B-page 15