PIC24FJ256DA210T-I/BG Microchip Technology, PIC24FJ256DA210T-I/BG Datasheet - Page 164

16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R

PIC24FJ256DA210T-I/BG

Manufacturer Part Number
PIC24FJ256DA210T-I/BG
Description
16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets

Specifications of PIC24FJ256DA210T-I/BG

Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (85.5K x 24)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ256DA210T-I/BG
Manufacturer:
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Quantity:
10 000
PIC24FJ256DA210 FAMILY
10.4
A major challenge in general purpose devices is provid-
ing the largest possible set of peripheral features while
minimizing the conflict of features on I/O pins. In an
application that needs to use more than one peripheral
multiplexed on a single pin, inconvenient work arounds
in application code or a complete redesign may be the
only option.
The Peripheral Pin Select (PPS) feature provides an
alternative to these choices by enabling the user’s
peripheral set selection and its placement on a wide
range of I/O pins. By increasing the pinout options
available on a particular device, users can better tailor
the microcontroller to their entire application, rather
than trimming the application to fit the device.
The Peripheral Pin Select feature operates over a fixed
subset of digital I/O pins. Users may independently
map the input and/or output of any one of many digital
peripherals to any one of these I/O pins. PPS is per-
formed in software and generally does not require the
device to be reprogrammed. Hardware safeguards are
included that prevent accidental or spurious changes to
the peripheral mapping once it has been established.
10.4.1
The PPS feature is used with a range of up to 44 pins,
depending on the particular device and its pin count.
Pins that support the Peripheral Pin Select feature
include the designation, “RPn” or “RPIn”, in their full pin
designation, where “n” is the remappable pin number.
“RP” is used to designate pins that support both remap-
pable input and output functions, while “RPI” indicates
pins that support remappable input functions only.
PIC24FJ256DA210 family devices support a larger
number of remappable input only pins than remappable
input/output pins. In this device family, there are up to
32 remappable input/output pins, depending on the pin
count of the particular device selected; these are num-
bered, RP0 through RP31. Remappable input only pins
are numbered above this range, from RPI32 to RPI43
(or the upper limit for that particular device).
See Table 1-1 for a summary of pinout options in each
package offering.
10.4.2
The peripherals managed by the PPS are all digital
only peripherals. These include general serial commu-
nications (UART and SPI), general purpose timer clock
inputs, timer related peripherals (input capture and out-
put compare) and external interrupt inputs. Also
included are the outputs of the comparator module,
since these are discrete digital signals.
PPS is not available for I
inputs, RTCC alarm outputs, EPMP signals, graphics
controller signals or peripherals with analog inputs.
DS39969B-page 164
Peripheral Pin Select (PPS)
AVAILABLE PINS
AVAILABLE PERIPHERALS
2
C™, change notification
A key difference between pin select and non-pin select
peripherals is that pin select peripherals are not asso-
ciated with a default I/O pin. The peripheral must
always be assigned to a specific I/O pin before it can be
used. In contrast, non pin select peripherals are always
available on a default pin, assuming that the peripheral
is active and not conflicting with another peripheral.
10.4.2.1
Pin-selectable peripheral outputs (e.g., OC, UART
transmit) will take priority over general purpose digital
functions on a pin, such as EPMP and port I/O. Special-
ized digital outputs, such as USB functionality, will take
priority over PPS outputs on the same pin. The pin
diagrams list peripheral outputs in the order of priority.
Refer to them for priority concerns on a particular pin.
Unlike PIC24F devices with fixed peripherals, pin
selectable peripheral inputs will never take ownership
of a pin. The pin’s output buffer will be controlled by the
TRISx setting or by a fixed peripheral on the pin. If the
pin is configured in digital mode then the PPS input will
operate correctly. If an analog function is enabled on
the pin the PPS input will be disabled.
10.4.3
PPS features are controlled through two sets of Special
Function Registers (SFRs): one to map peripheral
inputs and one to map outputs. Because they are
separately controlled, a particular peripheral’s input
and output (if the peripheral has both) can be placed on
any selectable function pin without constraint.
The
peripheral-selectable pin is handled in two different
ways, depending on if an input or an output is being
mapped.
10.4.3.1
The inputs of the Peripheral Pin Select options are
mapped on the basis of the peripheral; that is, a control
register associated with a peripheral dictates the pin it
will be mapped to. The RPINRx registers are used to
configure peripheral input mapping (see Register 10-8
through Register 10-28). Each register contains two
sets of 6-bit fields, with each set associated with one of
the pin-selectable peripherals. Programming a given
peripheral’s bit field with an appropriate 6-bit value
maps the RPn/RPIn pin with that value to that
peripheral. For any given device, the valid range of
values for any of the bit fields corresponds to the max-
imum number of Peripheral Pin Selections supported
by the device.
association
CONTROLLING PERIPHERAL PIN
SELECT
Peripheral Pin Select Function
Priority
Input Mapping
of
 2010 Microchip Technology Inc.
a
peripheral
to
a

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