PIC24FJ256DA210T-I/BG Microchip Technology, PIC24FJ256DA210T-I/BG Datasheet - Page 169

• Manufacturer Part Number: PIC24FJ256DA210T-I/BG
• Description: 16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256DA210T-I/BG

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 121-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.4.6
The PIC24FJ256DA210 family of devices implements
a total of 37 registers for remappable peripheral
configuration:
• Input Remappable Peripheral Registers (21)
• Output Remappable Peripheral Registers (16)
REGISTER 10-8:
REGISTER 10-9:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13-8
bit 7-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13-8
bit 7-6
bit 5-0
U-0
U-0
U-0
U-0
—
—
—
—
PERIPHERAL PIN SELECT
REGISTERS
Unimplemented: Read as ‘0’
INT1R<5:0>: Assign External Interrupt 1 (INT1) to Corresponding RPn or RPIn Pin bits
Unimplemented: Read as ‘0’
Unimplemented: Read as ‘0’
INT3R<5:0>: Assign External Interrupt 3 (INT3) to Corresponding RPn or RPIn Pin bits
Unimplemented: Read as ‘0’
INT2R<5:0>: Assign External Interrupt 2 (INT2) to Corresponding RPn or RPIn Pin bits
U-0
U-0
U-0
U-0
—
—
—
—
RPINR0: PERIPHERAL PIN SELECT INPUT REGISTER 0
RPINR1: PERIPHERAL PIN SELECT INPUT REGISTER 1
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
INT1R5
INT3R5
INT2R5
R/W-1
R/W-1
R/W-1
U-0
—
PIC24FJ256DA210 FAMILY
INT1R4
INT3R4
INT2R4
R/W-1
R/W-1
R/W-1
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
INT1R3
INT3R3
INT2R3
R/W-1
R/W-1
R/W-1
U-0
—
Note:
Input and output register values can only be
changed if IOLOCK (OSCCON<6>) = 0.
See Section 10.4.4.1 “Control Register
Lock” for a specific command sequence.
INT1R2
INT3R2
INT2R2
R/W-1
R/W-1
R/W-1
U-0
—
x = Bit is unknown
x = Bit is unknown
INT1R1
INT3R1
INT2R1
R/W-1
R/W-1
R/W-1
U-0
—
DS39969B-page 169
INT1R0
INT3R0
INT2R0
R/W-1
R/W-1
R/W-1
U-0
—
bit 8
bit 0
bit 8
bit 0