PIC24FJ256DA210T-I/BG Microchip Technology, PIC24FJ256DA210T-I/BG Datasheet - Page 197

16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R

PIC24FJ256DA210T-I/BG

Manufacturer Part Number
PIC24FJ256DA210T-I/BG
Description
16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets

Specifications of PIC24FJ256DA210T-I/BG

Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (85.5K x 24)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ256DA210T-I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
13.0
Devices in the PIC24FJ256DA210 family comprise
nine independent input capture modules. Each of the
modules offers a wide range of configuration and
operating options for capturing external pulse events
and generating interrupts.
Key features of the input capture module include:
• Hardware configurable for 32-bit operation in all
• Synchronous and Trigger modes of output
• A 4-level FIFO buffer for capturing and holding
• Configurable interrupt generation
• Up to 6 clock sources available for each module,
The module is controlled through two registers:
ICxCON1 (Register 13-1) and ICxCON2 (Register 13-2).
A general block diagram of the module is shown in
Figure 13-1.
FIGURE 13-1:
 2010 Microchip Technology Inc.
Note:
modes by cascading two adjacent modules
compare operation, with up to 30 user-selectable
sync/trigger sources available
timer values for several events
driving a separate internal 16-bit counter
Sync and
Trigger Sources
IC Clock
Sources
Note 1: The ICx inputs must be assigned to an available RPn/RPIn pin before use. See Section 10.4 “Peripheral Pin
ICX Pin
INPUT CAPTURE WITH
DEDICATED TIMERS
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
Section
Dedicated Timer” (DS39722). The infor-
mation in this data sheet supersedes the
information in the FRM.
(1)
Select (PPS)” for more information.
ICTSEL<2:0>
Prescaler
Sync and
Family
34.
INPUT CAPTURE BLOCK DIAGRAM
Counter
1:1/4/16
Trigger
Select
Clock
Logic
“Input
Reference
Increment
Reset
Capture
ICM<2:0>
SYNCSEL<4:0>
Trigger
Clock Synchronizer
Edge Detect Logic
Manual”,
PIC24FJ256DA210 FAMILY
ICXTMR
with
and
13.1
13.1.1
When the input capture module operates in a
free-running mode, the internal 16-bit counter,
ICxTMR, counts up continuously, wrapping around
from FFFFh to 0000h on each overflow, with its period
synchronized to the selected external clock source.
When a capture event occurs, the current 16-bit value
of the internal counter is written to the FIFO buffer.
In Synchronous mode, the module begins capturing
events on the ICx pin as soon as its selected clock
source is enabled. Whenever an event occurs on the
selected sync source, the internal counter is reset. In
Trigger mode, the module waits for a Sync event from
another internal module to occur before allowing the
internal counter to run.
Standard, free-running operation is selected by setting
the SYNCSEL bits (ICxCON2<4:0>) to ‘00000’ and
clearing the ICTRIG bit (ICxCON2<7>). Synchronous
and Trigger modes are selected any time the
SYNCSEL bits are set to any value except ‘00000’.
The ICTRIG bit selects either Synchronous or Trigger
mode; setting the bit selects Trigger mode operation. In
both modes, the SYNCSEL bits determine the
sync/trigger source.
When the SYNCSEL bits are set to ‘00000’ and
ICTRIG is set, the module operates in Software Trigger
mode. In this case, capture operations are started by
manually setting the TRIGSTAT bit (ICxCON2<6>).
16
General Operating Modes
SYNCHRONOUS AND TRIGGER
MODES
4-Level FIFO Buffer
ICOV, ICBNE
Event and
ICI1<:0>
Interrupt
ICXBUF
Logic
Set ICXIF
DS39969B-page 197
16
System Bus
16

Related parts for PIC24FJ256DA210T-I/BG