PIC24FJ256DA210T-I/BG Microchip Technology, PIC24FJ256DA210T-I/BG Datasheet - Page 219

• Manufacturer Part Number: PIC24FJ256DA210T-I/BG
• Description: 16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256DA210T-I/BG

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 121-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 15-3:
FIGURE 15-4:
 2010 Microchip Technology Inc.
Note 1:
Note 1: Using the SSx pin in Slave mode of operation is optional.
Processor 1 (SPI Enhanced Buffer Master)
2:
2: User must write transmit data to read received data from SPIxBUF. The SPIxTXB and SPIxRXB registers are
MSTEN (SPIxCON1<5>) = 1 and
Using the SSx pin in Slave mode of operation is optional.
User must write transmit data to read received data from SPIxBUF. The SPIxTXB and SPIxRXB registers are
memory mapped to SPIxBUF.
SPIBEN (SPIxCON2<0>) = 1
MSTEN (SPIxCON1<5>) = 1)
memory mapped to SPIxBUF.
Processor 1 (SPI Master)
MSb
8-Level FIFO Buffer
MSb
SPI MASTER/SLAVE CONNECTION (STANDARD MODE)
SPI MASTER/SLAVE CONNECTION (ENHANCED BUFFER MODES)
Serial Transmit Buffer
Serial Receive Buffer
Shift Register
(SPIxBUF)
SPIx Buffer
(SPIxSR)
Shift Register
(SPIxBUF)
SPIx Buffer
(SPIxRXB)
(SPIxTXB)
(SPIxSR)
(2)
(2)
LSb
LSb
SDOx
SCKx
SDIx
SDOx
SDIx
SCKx
PIC24FJ256DA210 FAMILY
SSx
Serial Clock
Serial Clock
SSEN (SPIxCON1<7>) = 1 and MSTEN (SPIxCON1<5>) = 0
SDIx
SDOx
SCKx
SSx
SDIx
SDOx
SCKx
SSx
Processor 2 (SPI Enhanced Buffer Slave)
(1)
(1)
MSb
Serial Transmit Buffer
MSTEN (SPIxCON1<5>) = 0 and
Serial Receive Buffer
Processor 2 (SPI Slave)
SPIBEN (SPIxCON2<0>) = 1
SSEN (SPIxCON1<7>) = 1,
Shift Register
(SPIxRXB)
(SPIxBUF)
(SPIxTXB)
(SPIxSR)
SPIx Buffer
MSb
8-Level FIFO Buffer
Shift Register
(SPIxBUF)
SPIx Buffer
(SPIxSR)
(2)
(2)
(2)
(2)
LSb
(2)
LSb
DS39969B-page 219