PIC24FJ256DA210T-I/BG Microchip Technology, PIC24FJ256DA210T-I/BG Datasheet - Page 227

• Manufacturer Part Number: PIC24FJ256DA210T-I/BG
• Description: 16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256DA210T-I/BG

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 121-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 16-1:
 2010 Microchip Technology Inc.
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
ACKDT: Acknowledge Data bit (when operating as I
Value that will be transmitted when the software initiates an Acknowledge sequence.
1 = Sends NACK during Acknowledge
0 = Sends ACK during Acknowledge
ACKEN: Acknowledge Sequence Enable bit (when operating as I
receive.)
1 = Initiates Acknowledge sequence on SDAx and SCLx pins and transmits the ACKDT data bit.
0 = Acknowledge sequence is not in progress
RCEN: Receive Enable bit (when operating as I
1 = Enables Receive mode for I
0 = Receive sequence is not in progress
PEN: Stop Condition Enable bit (when operating as I
1 = Initiates Stop condition on the SDAx and SCLx pins. Hardware is clear at the end of the master
0 = Stop condition is not in progress
RSEN: Repeated Start Condition Enabled bit (when operating as I
1 = Initiates Repeated Start condition on the SDAx and SCLx pins. Hardware is clear at the end of the
0 = Repeated Start condition is not in progress
SEN: Start Condition Enabled bit (when operating as I
1 = Initiates Start condition on SDAx and SCLx pins. Hardware is clear at end of the master Start
0 = Start condition is not in progress
Hardware is clear at the end of the master Acknowledge sequence.
data byte.
Stop sequence.
master Repeated Start sequence
sequence.
I2CxCON: I2Cx CONTROL REGISTER (CONTINUED)
PIC24FJ256DA210 FAMILY
2
C. Hardware is clear at the end of the eighth bit of the master receive
2
C master)
2
2
C master. Applicable during master receive.)
C master)
2
C master)
2
C master. Applicable during master
2
C master)
DS39969B-page 227