PIC24FJ256DA210T-I/BG Microchip Technology, PIC24FJ256DA210T-I/BG Datasheet - Page 236

16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R

PIC24FJ256DA210T-I/BG

Manufacturer Part Number
PIC24FJ256DA210T-I/BG
Description
16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets

Specifications of PIC24FJ256DA210T-I/BG

Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (85.5K x 24)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ256DA210T-I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC24FJ256DA210 FAMILY
REGISTER 17-2:
DS39969B-page 236
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
HS = Hardware Settable bit
bit 15,13
bit 14
bit 12
bit 11
bit 10
bit 9
bit 8
Note 1:
URXISEL1
UTXISEL1
R/W-0
R/W-0
2:
Value of bit only affects the transmit properties of the module when the IrDA
(IREN = 1).
If UARTEN = 1, the peripheral inputs and outputs must be configured to an available RPn/RPIn pin. See
Section 10.4 “Peripheral Pin Select (PPS)” for more information.
UTXISEL<1:0>: Transmission Interrupt Mode Selection bits
11 = Reserved; do not use
10 = Interrupt when a character is transferred to the Transmit Shift Register (TSR) and as a result, the
01 = Interrupt when the last character is shifted out of the Transmit Shift Register; all transmit
00 = Interrupt when a character is transferred to the Transmit Shift Register (this implies there is at
UTXINV: IrDA
IREN = 0:
1 = UxTX is Idle ‘0’
0 = UxTX is Idle ‘1’
IREN = 1:
1 = UxTX is Idle ‘1’
0 = UxTX is Idle ‘0’
Unimplemented: Read as ‘0’
UTXBRK: Transmit Break bit
1 = Send Sync Break on next transmission – Start bit, followed by twelve ‘0’ bits, followed by Stop bit;
0 = Sync Break transmission is disabled or completed
UTXEN: Transmit Enable bit
1 = Transmit is enabled, UxTX pin controlled by UARTx
0 = Transmit is disabled, any pending transmission is aborted and the buffer is reset; UxTX pin is
UTXBF: Transmit Buffer Full Status bit (read-only)
1 = Transmit buffer is full
0 = Transmit buffer is not full, at least one more character can be written
TRMT: Transmit Shift Register Empty bit (read-only)
1 = Transmit Shift Register is empty and transmit buffer is empty (the last transmission has completed)
0 = Transmit Shift Register is not empty, a transmission is in progress or queued
URXISEL0
UTXINV
R/W-0
R/W-0
cleared by hardware upon completion
controlled by port.
transmit buffer becomes empty
operations are completed
least one character open in the transmit buffer)
UxSTA: UARTx STATUS AND CONTROL REGISTER
(1)
®
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
HC = Hardware Clearable bit
Encoder Transmit Polarity Inversion bit
UTXISEL0
ADDEN
R/W-0
R/W-0
(2)
R-1, HSC
RIDLE
U-0
HSC = Hardware Settable/Clearable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0 HC
R-0, HSC
UTXBRK
PERR
(1)
UTXEN
R-0, HSC
R/W-0
FERR
(2)
®
 2010 Microchip Technology Inc.
x = Bit is unknown
encoder is enabled
R/C-0, HS
R-0, HSC
UTXBF
OERR
R-1, HSC
R-0, HSC
URXDA
TRMT
bit 8
bit 0

Related parts for PIC24FJ256DA210T-I/BG