PIC24FJ256DA210T-I/BG Microchip Technology, PIC24FJ256DA210T-I/BG Datasheet - Page 237

16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R

PIC24FJ256DA210T-I/BG

Manufacturer Part Number
PIC24FJ256DA210T-I/BG
Description
16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets

Specifications of PIC24FJ256DA210T-I/BG

Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (85.5K x 24)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ256DA210T-I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
REGISTER 17-2:
 2010 Microchip Technology Inc.
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
2:
Value of bit only affects the transmit properties of the module when the IrDA
(IREN = 1).
If UARTEN = 1, the peripheral inputs and outputs must be configured to an available RPn/RPIn pin. See
Section 10.4 “Peripheral Pin Select (PPS)” for more information.
URXISEL<1:0>: Receive Interrupt Mode Selection bits
11 = Interrupt is set on an RSR transfer, making the receive buffer full (i.e., has 4 data characters)
10 = Interrupt is set on an RSR transfer, making the receive buffer 3/4 full (i.e., has 3 data characters)
0x = Interrupt is set when any character is received and transferred from the RSR to the receive buffer;
ADDEN: Address Character Detect bit (bit 8 of received data = 1)
1 = Address Detect mode is enabled
If 9-bit mode is not selected, this does not take effect.
0 = Address Detect mode is disabled
RIDLE: Receiver Idle bit (read-only)
1 = Receiver is Idle
0 = Receiver is active
PERR: Parity Error Status bit (read-only)
1 = Parity error has been detected for the current character (character at the top of the receive FIFO)
0 = Parity error has not been detected
FERR: Framing Error Status bit (read-only)
1 = Framing error has been detected for the current character (character at the top of the receive FIFO)
0 = Framing error has not been detected
OERR: Receive Buffer Overrun Error Status bit (clear/read-only)
1 = Receive buffer has overflowed
0 = Receive buffer has not overflowed (clearing a previously set OERR bit (1  0 transition); will reset
URXDA: Receive Buffer Data Available bit (read-only)
1 = Receive buffer has data, at least one more character can be read
0 = Receive buffer is empty
the receiver buffer and the RSR to the empty state
receive buffer has one or more characters
UxSTA: UARTx STATUS AND CONTROL REGISTER (CONTINUED)
PIC24FJ256DA210 FAMILY
®
encoder is enabled
DS39969B-page 237

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