PIC24FJ256DA210T-I/BG Microchip Technology, PIC24FJ256DA210T-I/BG Datasheet - Page 264

• Manufacturer Part Number: PIC24FJ256DA210T-I/BG
• Description: 16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256DA210T-I/BG

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 121-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC24FJ256DA210 FAMILY
18.7.2
REGISTER 18-14: U1OTGIR: USB OTG INTERRUPT STATUS REGISTER (HOST MODE ONLY)
DS39969B-page 264
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/K-0, HS
Note:
IDIF
U-0
—
V
USB INTERRUPT REGISTERS
Individual bits can only be cleared by writing a ‘1’ to the bit position as part of a word write operation on the
entire register. Using Boolean instructions or bitwise operations to write to a single bit position will cause
all set bits at the moment of the write to become cleared.
BUS
Unimplemented: Read as ‘0’
IDIF: ID State Change Indicator bit
1 = Change in ID state is detected
0 = No ID state change is detected
T1MSECIF: 1 Millisecond Timer bit
1 = The 1 millisecond timer has expired
0 = The 1 millisecond timer has not expired
LSTATEIF: Line State Stable Indicator bit
1 = USB line state (as defined by the SE0 and JSTATE bits) has been stable for 1 ms, but different from
0 = USB line state has not been stable for 1 ms
ACTVIF: Bus Activity Indicator bit
1 = Activity on the D+/D- lines or V
0 = No activity on the D+/D- lines or V
SESVDIF: Session Valid Change Indicator bit
1 = V
0 = V
SESENDIF: B-Device V
1 = V
0 = V
Unimplemented: Read as ‘0’
VBUSVDIF: A-Device V
1 = V
0 = No V
T1MSECIF
R/K-0, HS
threshold crossings may be either rising or falling.
the last time
OTG Specification)
OTG Specification)
U-0
—
BUS
BUS
BUS
BUS
BUS
BUS
has crossed VA_SESS_END (as defined in the USB OTG Specification)
has not crossed VA_SESS_END
has not crossed VA_SESS_END
change on A-device is detected; V
change on B-device detected; V
change on A-device is detected
K = Write ‘1’ to clear bit
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
LSTATEIF
R/K-0, HS
U-0
—
(1)
(1)
BUS
BUS
Change Indicator bit
Change Indicator bit
R/K-0, HS
ACTVIF
U-0
—
BUS
BUS
is detected
is detected
BUS
HS = Hardware Settable bit
‘0’ = Bit is cleared
BUS
R/K-0, HS
SESVDIF
has crossed VB_SESS_END (as defined in the USB
U-0
has crossed VA_VBUS_VLD (as defined in the USB
—
SESENDIF
R/K-0, HS
U-0
—
 2010 Microchip Technology Inc.
x = Bit is unknown
U-0
U-0
—
—
(1)
VBUSVDIF
R/K-0, HS
U-0
—
bit 8
bit 0