PIC24FJ256DA210T-I/BG Microchip Technology, PIC24FJ256DA210T-I/BG Datasheet - Page 28

• Manufacturer Part Number: PIC24FJ256DA210T-I/BG
• Description: 16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256DA210T-I/BG

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 121-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC24FJ256DA210 FAMILY
TABLE 1-3:
DS39969B-page 28
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RD7
RD8
RD9
RD10
RD11
RD12
RD13
RD14
RD15
RE0
RE1
RE2
RE3
RE4
RE5
RE6
RE7
RE8
RE9
REFO
RF0
RF1
RF2
RF3
RF4
RF5
RF7
RF8
RF12
RF13
Legend:
Note 1:
Function
2:
3:
4:
TTL = TTL input buffer
ANA = Analog level input/output
The alternate EPMP pins are selected when the ALTPMP (CW3<12>) bit is programmed to ‘0’.
The PMSC2 signal will replace the PMA15 signal on the 15-pin PMA when CSF<1:0> = 01 or 10.
The PMCS1 signal will replace the PMA14 signal on the 14-pin PMA when CSF<1:0> = 10.
The alternate V
TQFP/QFN
64-Pin
46
49
50
51
52
53
54
55
42
43
44
45
33
31
32
—
—
—
—
60
61
62
63
64
—
—
30
58
59
—
34
—
—
—
1
2
3
PIC24FJ256DA210 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin Number
REF
100-Pin
TQFP
pins selected when the ALTVREF (CW1<5>) bit is programmed to ‘0’.
100
72
76
77
78
81
82
83
84
68
69
70
71
79
80
47
48
93
94
98
99
18
19
44
87
88
52
51
49
50
54
53
40
39
3
4
5
121-Pin
BGA
A11
A10
E10
D11
C11
K11
K10
L10
L11
J10
D9
B9
C8
B8
D7
C7
E9
A9
D8
K9
A4
B4
B3
A2
A1
D3
C1
D2
G1
G2
B6
A6
H8
K6
L9
L8
L6
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
Buffer
Input
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
ST = Schmitt Trigger input buffer
I
2
C™ = I
PORTD Digital I/O.
PORTE Digital I/O.
Reference Clock Output.
PORTF Digital I/O.
2
C/SMBus input buffer
Description
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