PIC24FJ256DA210T-I/BG Microchip Technology, PIC24FJ256DA210T-I/BG Datasheet - Page 307

16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R

PIC24FJ256DA210T-I/BG

Manufacturer Part Number
PIC24FJ256DA210T-I/BG
Description
16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets

Specifications of PIC24FJ256DA210T-I/BG

Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (85.5K x 24)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ256DA210T-I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
REGISTER 22-3:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-8
bit 7-5
bit 4-0
PUBPP2
R/W-0
R/W-0
G1EN
G1EN: Module Enable bit
1 = Display module is enabled
0 = Display module is disabled
Unimplemented: Read as ‘0’
G1SIDL: Stop in Idle bit
1 = Display module stops in Idle mode
0 = Display module does not stop in Idle mode
GCMDWMK<4:0>: Command FIFO Watermark bits
Sets the command watermark level that triggers the CMDLVIF interrupt and sets the CMDLV flag;
GCMDWMK<4:0> (10000 = Reserved)
10000 = If the number of commands present in the FIFO goes from 16 to 15 commands, the CMDLVIF
01111 =
.
.
.
00001 = If the number of commands present in the FIFO goes from 1 to 0 commands, the CMDLVIF
00000 = CMDLVIF interrupt will not trigger and the CMDLV flag will not be set
PUBPP<2:0>: GPU bits-per-pixel (bpp) Setting bits
Other = Reserved
100 = 16 bits-per-pixel
011 = 8 bits-per-pixel
010 = 4 bits-per-pixel
001 = 2 bits-per -pixel
000 = 1-bit -per-pixel
GCMDCNT<4:0>: Command FIFO Occupancy Status bits
When the FIFO is full, any additional commands written to the FIFO are discarded.
10000 = 16 commands are present in the FIFO
01111 = 15 commands are present in the FIFO
.
.
.
0001 = 1 command is present in the FIFO
0000 = 0 command is present in the FIFO
PUBPP1
R/W-0
U-0
G1CON1: DISPLAY CONTROL REGISTER 1
interrupt will trigger and the CMDLV flag will be set
interrupt will trigger and CMDLV flag will be set
interrupt will trigger and the CMDLV flag will be set
f the number of commands present in the FIFO goes from 15 to 14 commands, CMDLVIF
HSC = Hardware Settable/Clearable bit
W = Writable bit
‘1’ = Bit is set
PUBPP0
G1SIDL
R/W-0
R/W-0
GCMDWMK4 GCMDWMK3 GCMDWMK2 GCMDWMK1 GCMDWMK0
GCMDCNT4
R-0, HSC
R/W-0
PIC24FJ256DA210 FAMILY
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
GCMDCNT3
R-0, HSC
R/W-0
GCMDCNT2
R-0, HSC
R/W-0
x = Bit is unknown
GCMDCNT1
R-0, HSC
R/W-0
DS39969B-page 307
GCMDCNT0
R-0, HSC
R/W-0
bit 8
bit 0

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