PIC24FJ64GB002-I/SS Microchip Technology, PIC24FJ64GB002-I/SS Datasheet - Page 10

16-bit, 16 MIPS, 64KB Flash, 8KB RAM, Nanowatt XLP, USB OTG 28 SSOP .209in TUBE

PIC24FJ64GB002-I/SS

Manufacturer Part Number
PIC24FJ64GB002-I/SS
Description
16-bit, 16 MIPS, 64KB Flash, 8KB RAM, Nanowatt XLP, USB OTG 28 SSOP .209in TUBE
Manufacturer
Microchip Technology

Specifications of PIC24FJ64GB002-I/SS

Processor Series
PIC24
Core
PIC24F
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
64 KB
Data Ram Size
8192 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SSOP-28
Development Tools By Supplier
MPLAB Integrated Development Environment
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
300 mA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ64GB002-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC24FJ64GB002-I/SS
0
PIC24FJ64GB004 FAMILY
1.2
The PIC24FJ64GB004 family of devices introduces
USB On-The-Go functionality on a single chip to lower
pin count Microchip devices. This module provides
on-chip functionality as a target device compatible with
the USB 2.0 standard, as well as limited stand-alone
functionality as a USB embedded host. By implement-
ing USB Host Negotiation Protocol (HNP), the module
can also dynamically switch between device and host
operation, allowing for a much wider range of versatile
USB-enabled
platform.
In addition to USB host functionality, PIC24FJ64GB004
family devices provide a true single chip USB solution,
including an on-chip transceiver and a voltage boost
generator for sourcing bus power during host
operations.
1.3
• Peripheral Pin Select: The Peripheral Pin Select
• Communications: The PIC24FJ64GB004 family
• Analog Features: All members of the
• CTMU Interface: This module provides a
DS39940D-page 10
feature allows most digital peripherals to be
mapped over a fixed set of digital I/O pins. Users
may independently map the input and/or output of
any one of the many digital peripherals to any one
of the I/O pins.
incorporates a range of serial communication
peripherals to handle a range of application
requirements. There are two independent I
modules that support both Master and Slave
modes of operation. Devices also have, through
the Peripheral Pin Select (PPS) feature, two
independent UARTs with built-in IrDA
encoder/decoders and two SPI modules.
PIC24FJ64GB004 family include a 10-bit A/D
Converter module and a triple comparator
module. The A/D module incorporates program-
mable acquisition time, allowing for a channel to
be selected and a conversion to be initiated
without waiting for a sampling period, as well as
faster sampling speeds. The comparator module
includes three analog comparators that are
configurable for a wide range of operations.
convenient method for precision time measure-
ment and pulse generation, and can serve as an
interface for capacitive sensors.
USB On-The-Go
Other Special Features
applications
on
a
®
microcontroller
2
C™
• Parallel Master/Enhanced Parallel Slave Port:
• Real-Time Clock/Calendar: This module
1.4
Devices in the PIC24FJ64GB004 family are available
in 28-pin and 44-pin packages. The general block
diagram for all devices is shown in Figure 1-1.
The devices are differentiated from each other in
several ways:
• Flash Program Memory:
• Available I/O Pins and Ports:
• Available Interrupt-on-Change Notification (ICN)
• Available Remappable Pins:
• Available PMP Address Pins:
• Available A/D Input Channels:
All other features for devices in this family are identical.
These are summarized in Table 1-1.
A list of the pin features available on the
PIC24FJ64GB004 family devices, sorted by function, is
shown in Table 1-2. Note that this table shows the pin
location of individual peripheral features and not how
they are multiplexed on the same pin. This information
is provided in the pinout diagrams in the beginning of
this data sheet. Multiplexed features are sorted by the
priority given to a feature, with the highest priority
peripheral being listed first.
One of the general purpose I/O ports can be
reconfigured for enhanced parallel data communi-
cations. In this mode, the port can be configured
for both master and slave operations, and
supports 8-bit and 16-bit data transfers with up to
12 external address lines in Master modes.
implements a full-featured clock and calendar with
alarm functions in hardware, freeing up timer
resources and program memory space for the use
of the core application.
- PIC24FJ32GB0 devices – 32 Kbytes
- PIC24FJ64GB0 devices – 64 Kbytes
- 28-pin devices – 19 pins on two ports
- 44-pin devices – 33 pins on three ports
Inputs:
- 28-pin devices – 19
- 44-pin devices – 29
- 28-pin devices – 15 pins
- 44-pin devices – 25 pins
- 28-pin devices – 3 pins
- 44-pin devices – 12 pins
- 28-pin devices – 9 pins
- 44-pin devices – 12 pins
Details on Individual Family
Members
 2010 Microchip Technology Inc.

Related parts for PIC24FJ64GB002-I/SS