PIC24FJ64GB002-I/SS Microchip Technology, PIC24FJ64GB002-I/SS Datasheet - Page 135

16-bit, 16 MIPS, 64KB Flash, 8KB RAM, Nanowatt XLP, USB OTG 28 SSOP .209in TUBE

PIC24FJ64GB002-I/SS

Manufacturer Part Number
PIC24FJ64GB002-I/SS
Description
16-bit, 16 MIPS, 64KB Flash, 8KB RAM, Nanowatt XLP, USB OTG 28 SSOP .209in TUBE
Manufacturer
Microchip Technology

Specifications of PIC24FJ64GB002-I/SS

Processor Series
PIC24
Core
PIC24F
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
64 KB
Data Ram Size
8192 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SSOP-28
Development Tools By Supplier
MPLAB Integrated Development Environment
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
300 mA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ64GB002-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC24FJ64GB002-I/SS
0
10.4.6
The PIC24FJ64GB004 family of devices implements a
total of 27 registers for remappable peripheral
configuration:
• Input Remappable Peripheral Registers (14)
• Output Remappable Peripheral Registers (13)
REGISTER 10-1:
REGISTER 10-2:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-8
bit 7-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-5
bit 4-0
U-0
U-0
U-0
U-0
PERIPHERAL PIN SELECT
REGISTERS
Unimplemented: Read as ‘0’
INT1R<4:0>: Assign External Interrupt 1 (INT1) to Corresponding RPn or RPIn Pin bits
Unimplemented: Read as ‘0’
Unimplemented: Read as ‘0’
INT1R<4:0>: Assign External Interrupt 2 (INT2) to Corresponding RPn or RPIn Pin bits
U-0
U-0
U-0
U-0
RPINR0: PERIPHERAL PIN SELECT INPUT REGISTER 0
RPINR1: PERIPHERAL PIN SELECT INPUT REGISTER 1
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
U-0
U-0
U-0
U-0
INT1R4
INT2R4
R/W-1
R/W-1
U-0
U-0
PIC24FJ64GB004 FAMILY
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
INT1R3
INT2R3
R/W-1
R/W-1
U-0
U-0
Note:
Input and output register values can only be
changed if IOLOCK (OSCCON<6>) = 0.
See Section 10.4.4.1 “Control Register
Lock” for a specific command sequence.
INT1R2
INT2R2
R/W-1
R/W-1
U-0
U-0
x = Bit is unknown
x = Bit is unknown
INT1R1
INT2R1
R/W-1
R/W-1
U-0
U-0
DS39940D-page 135
INT1R0
INT2R0
R/W-1
R/W-1
U-0
U-0
bit 8
bit 0
bit 8
bit 0

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