PIC24FJ64GB002-I/SS Microchip Technology, PIC24FJ64GB002-I/SS Datasheet - Page 207

• Manufacturer Part Number: PIC24FJ64GB002-I/SS
• Description: 16-bit, 16 MIPS, 64KB Flash, 8KB RAM, Nanowatt XLP, USB OTG 28 SSOP .209in TUBE
• Manufacturer: Microchip Technology

Specifications of PIC24FJ64GB002-I/SS

• Processor Series: PIC24
• Core: PIC24F
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 8192 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-28
• Development Tools By Supplier: MPLAB Integrated Development Environment
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current (max): 300 mA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

18.3.1
Unlike device level interrupts, the USB OTG interrupt
status flags are not freely writable in software. All USB
OTG flag bits are implemented as hardware set only
bits. Additionally, these bits can only be cleared in
FIGURE 18-10:
18.4
The following section describes how to perform a com-
mon Device mode task. In Device mode, USB transfers
are performed at the transfer level. The USB module
automatically performs the status phase of the transfer.
18.4.1
1.
2.
3.
4.
 2010 Microchip Technology Inc.
Note 1:
Differential Data
Reset the Ping-Pong Buffer Pointers by setting,
then clearing, the Ping-Pong Buffer Reset bit
PPBRST (U1CON<1>).
Disable all interrupts (U1IE and U1EIE = 00h).
Clear any existing interrupt flags by writing FFh
to U1IR and U1EIR.
Verify that V
only).
Device Mode Operation
CLEARING USB OTG INTERRUPTS
ENABLING DEVICE MODE
The control transfer shown here is only an example showing events that can occur for every transaction. Typical
control transfers will spread across multiple frames.
USB Reset
URSTIF
RESET
BUS
Start-of-Frame (SOF)
is present (non OTG devices
EXAMPLE OF A USB TRANSACTION AND INTERRUPT EVENTS
SOFIF
SOF
SETUP
PIC24FJ64GB004 FAMILY
DATA
STATUS
software by writing a ‘1’ to their locations (i.e., perform-
ing a MOV type instruction). Writing a ‘0’ to a flag bit (i.e.,
a BCLR instruction) has no effect.
5.
6.
7.
8.
9.
SETUP Token
OUT Token
Control Transfer
From Host
From Host
From Host
Note:
IN Token
Enable the USB module by setting the USBEN
bit (U1CON<0>).
Set the OTGEN bit (U1OTGCON<2>) to enable
OTG operation.
Enable the endpoint zero buffer to receive the
first setup packet by setting the EPRXEN and
EPHSHK bits for Endpoint 0 (U1EP0<3,0> = 1).
Power up the USB module by setting the
USBPWR bit (U1PWRC<0>).
Enable the D+ pull-up resistor to signal an attach
by setting DPPULUP (U1OTGCON<7>).
Throughout this data sheet, a bit that can
only be cleared by writing a ‘1’ to its loca-
tion is referred to as “Write ‘1’ to clear”. In
register descriptions, this function is
indicated by the descriptor “K”.
Empty Data
Transaction
From Host
From Host
To Host
(1)
Data
Data
From Host
To Host
To Host
ACK
ACK
ACK
SOF
1 ms Frame
DS39940D-page 207
Set TRNIF
Set TRNIF
Set TRNIF
Transaction
Complete