PIC24FJ64GB002-I/SS Microchip Technology, PIC24FJ64GB002-I/SS Datasheet - Page 242

• Manufacturer Part Number: PIC24FJ64GB002-I/SS
• Description: 16-bit, 16 MIPS, 64KB Flash, 8KB RAM, Nanowatt XLP, USB OTG 28 SSOP .209in TUBE
• Manufacturer: Microchip Technology

Specifications of PIC24FJ64GB002-I/SS

• Processor Series: PIC24
• Core: PIC24F
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 8192 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-28
• Development Tools By Supplier: MPLAB Integrated Development Environment
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current (max): 300 mA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FJ64GB004 FAMILY
20.2
The RTCC module registers are organized as three
categories:
• RTCC Control Registers
• RTCC Value Registers
• Alarm Value Registers
20.2.1
To limit the register interface, the RTCC Timer and
Alarm
corresponding register pointers. The RTCC Value
register window (RTCVALH and RTCVALL) uses the
RTCPTR bits (RCFGCAL<9:8>) to select the desired
Timer register pair (see Table 20-1).
By writing to the RTCVALH byte, the RTCC Pointer
value, RTCPTR<1:0> bits, decrements by one until
they reach ‘00’. After they reach ‘00’, the MINUTES
and SECONDS value will be accessible through
RTCVALH and RTCVALL until the pointer value is
manually changed.
TABLE 20-1:
The Alarm Value register window (ALRMVALH and
ALRMVALL)
(ALCFGRPT<9:8>) to select the desired Alarm register
pair (see Table 20-2).
By writing to the ALRMVALH byte, the Alarm Pointer
value, ALRMPTR<1:0> bits, decrements by one until
they reach ‘00’. Once they reach ‘00’, the ALRMMIN
and ALRMSEC value will be accessible through
ALRMVALH and ALRMVALL until the pointer value is
manually changed.
EXAMPLE 20-1:
DS39940D-page 242
RTCPTR<1:0>
asm volatile(“push w7”);
asm volatile(“push w8”);
asm volatile(“disi #5”);
asm volatile(“mov #0x55, w7”);
asm volatile(“mov w7, _NVMKEY”);
asm volatile(“mov #0xAA, w8”);
asm volatile(“mov w8, _NVMKEY”);
asm volatile(“bset _RCFGCAL, #13”);
asm volatile(“pop w8”);
asm volatile(“pop w7”);
00
01
10
11
Time
RTCC Module Registers
REGISTER MAPPING
registers
uses
RTCVAL<15:8>
RTCVAL REGISTER MAPPING
RTCC Value Register Window
WEEKDAY
MINUTES
MONTH
SETTING THE RTCWREN BIT
—
the
are
accessed
ALRMPTR
RTCVAL<7:0>
SECONDS
HOURS
YEAR
DAY
through
bits
//set the RTCWREN bit
TABLE 20-2:
Considering that the 16-bit core does not distinguish
between 8-bit and 16-bit read operations, the user must
be aware that when reading either the ALRMVALH or
ALRMVALL bytes, the ALRMPTR<1:0> value will be
decremented. The same applies to the RTCVALH or
RTCVALL bytes with the RTCPTR<1:0> being
decremented.
20.2.2
In order to perform a write to any of the RTCC Timer
registers, the RTCWREN bit (RCFGCAL<13>) must be
set (refer to Example 20-1).
20.2.3
The clock source for the RTCC module can be selected
using the Flash Configuration bit, RTCOSC (CW4<5>).
When the bit is set to ‘1’, the Secondary Oscillator
(SOSC) is used as the reference clock, and when the
bit is ‘0’, LPRC is used as the reference clock.
ALRMPTR
Note:
Note:
<1:0>
00
01
10
11
This only applies to read operations and
not write operations.
WRITE LOCK
To avoid accidental writes to the timer, it is
recommended that the RTCWREN bit
(RCFGCAL<13>) is kept clear at any
other time. For the RTCWREN bit to be
set, there is only one instruction cycle time
window allowed between the 55h/AA
sequence and the setting of RTCWREN;
therefore, it is recommended that code
follow the procedure in Example 20-1.
SELECTING RTCC CLOCK SOURCE
ALRMVAL<15:8> ALRMVAL<7:0>
ALRMVAL REGISTER
MAPPING
Alarm Value Register Window
ALRMMNTH
ALRMMIN
ALRMWD
 2010 Microchip Technology Inc.
—
ALRMSEC
ALRMDAY
ALRMHR
—