PIC24FJ64GB002-I/SS Microchip Technology, PIC24FJ64GB002-I/SS Datasheet - Page 265

• Manufacturer Part Number: PIC24FJ64GB002-I/SS
• Description: 16-bit, 16 MIPS, 64KB Flash, 8KB RAM, Nanowatt XLP, USB OTG 28 SSOP .209in TUBE
• Manufacturer: Microchip Technology

Specifications of PIC24FJ64GB002-I/SS

• Processor Series: PIC24
• Core: PIC24F
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 8192 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-28
• Development Tools By Supplier: MPLAB Integrated Development Environment
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current (max): 300 mA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 22-5:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-0
Note 1:
PCFG15
R/W-0
PCFG7
R/W-0
(1)
Analog channels, AN6, AN7, AN8 and AN12, are unavailable on 28-pin devices; leave these corresponding
bits set.
PCFG15: A/D Input Band Gap Reference Enable bit
1 = Internal band gap (V
0 = Internal band gap reference channel is enabled
PCFG14: A/D Input Half Band Gap Reference Enable bit
1 = Internal half band gap (V
0 = Internal half band gap reference channel is enabled
PCFG13: A/D Input Voltage Regulator Output Reference Enable bit
1 = Internal voltage regulator output (V
0 = Internal voltage regulator output reference channel is enabled
PCFG<12:0>: Analog Input Pin Configuration Control bits
1 = Pin for corresponding analog channel is configured in Digital mode; I/O port read is enabled
0 = Pin is configured in Analog mode; I/O port read is disabled, A/D samples pin voltage
PCFG14
R/W-0
PCFG6
R/W-0
AD1PCFG: A/D PORT CONFIGURATION REGISTER
(1)
W = Writable bit
‘1’ = Bit is set
PCFG13
PCFG5
R/W-0
R/W-0
BG
) reference channel is disabled
BG
R/W-0
PCFG12
/2) reference channel is disabled
PCFG4
R/W-0
PIC24FJ64GB004 FAMILY
(1)
DDCORE
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PCFG11
PCFG3
) reference channel is disabled
R/W-0
R/W-0
(1)
PCFG10
PCFG2
R/W-0
R/W-0
x = Bit is unknown
PCFG9
PCFG1
R/W-0
R/W-0
DS39940D-page 265
R/W-0
PCFG0
PCFG8
R/W-0
(1)
bit 8
bit 0