PIC24HJ256GP610T-I/PT Microchip Technology, PIC24HJ256GP610T-I/PT Datasheet - Page 53

256KB, Flash, 16384bytes-RAM, 40MIPS, 85I/O, 16-bit Family 100 TQFP 12x12x1mm T/

PIC24HJ256GP610T-I/PT

Manufacturer Part Number
PIC24HJ256GP610T-I/PT
Description
256KB, Flash, 16384bytes-RAM, 40MIPS, 85I/O, 16-bit Family 100 TQFP 12x12x1mm T/
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ256GP610T-I/PT

Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (85.5K x 24)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b, 32x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN, I2C, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
85
Number Of Timers
13
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (12 bit, 32 Channel)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDAC164333 - MODULE SKT FOR PM3 100QFPDM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24HJ256GP610T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
6.2
After
programmed to executive memory using ICSP, it must
be verified. Verification is performed by reading out the
contents of executive memory and comparing it with
the image of the programming executive stored in the
programmer.
TABLE 6-2:
© 2010 Microchip Technology Inc.
Step 1: Exit the Reset vector.
Step 2: Initialize TBLPAG and the read pointer (W6) for TBLRD instruction.
Step 3: Initialize the write pointer (W7) and store the next four locations of code memory to W0:W5.
Command
(Binary)
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
the
Programming Verification
programming
READING EXECUTIVE MEMORY
040200
040200
000000
200800
880190
EB0300
EB0380
000000
BA1B96
000000
000000
BADBB6
000000
000000
BADBD6
000000
000000
BA1BB6
000000
000000
BA1B96
000000
000000
BADBB6
000000
000000
BADBD6
000000
000000
BA0BB6
000000
000000
(Hex)
Data
executive
GOTO
GOTO
NOP
MOV
MOV
CLR
CLR
NOP
TBLRDL
NOP
NOP
TBLRDH.B
NOP
NOP
TBLRDH.B
NOP
NOP
TBLRDL
NOP
NOP
TBLRDL
NOP
NOP
TBLRDH.B
NOP
NOP
TBLRDH.B
NOP
NOP
TBLRDL
NOP
NOP
0x200
#0x80, W0
W0, TBLPAG
W6
0x200
has
W7
[W6], [W7++]
[W6++], [W7++]
[++W6], [W7++]
[W6++], [W7++]
[W6], [W7++]
[W6++], [W7++]
[++W6], [W7++]
[W6++], [W7]
been
Reading the contents of executive memory can be
performed using the same technique described in
Section 5.8 “Reading Code
for reading executive memory is shown in
Note that in Step 2, the TBLPAG register is set to 0x80,
such that executive memory may be read.
Description
Memory”. A procedure
DS70152H-page 53
Table
6-2.

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