PIC24HJ64GP502T-I/MM Microchip Technology, PIC24HJ64GP502T-I/MM Datasheet - Page 12

16 Bit MCU 40MIPS 64 KB FLASH 28 QFN-S 6x6mm T/R

PIC24HJ64GP502T-I/MM

Manufacturer Part Number
PIC24HJ64GP502T-I/MM
Description
16 Bit MCU 40MIPS 64 KB FLASH 28 QFN-S 6x6mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ64GP502T-I/MM

Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-QFN
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel / 12 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24HJ64GP502T-I/MM
Manufacturer:
MICROCHIP
Quantity:
12 000
3.6
3.6.1
The dsPIC33F/PIC24H devices have Configuration
bits stored in twelve 8-bit Configuration registers,
aligned on even configuration memory address
boundaries. These bits can be set or cleared to select
various device configurations. There are three types of
Configuration bits: system operation bits, code-protect
bits and unit ID bits. The system operation bits
determine the power-on settings for system level
TABLE 3-2:
DS70152H-page 12
RBS<1:0>
BSS<2:0>
Bit Field
Configuration Bits Programming
OVERVIEW
dsPIC33F/PIC24H CONFIGURATION BITS DESCRIPTION
Register
FBS
FBS
Boot Segment Data RAM Code Protection
11 = No RAM is reserved for Boot Segment
10 = Small-Sized Boot RAM
[128 bytes of RAM are reserved for Boot Segment]
01 = Medium-Sized Boot RAM
[256 bytes of RAM are reserved for Boot Segment]
00 = Large-Sized Boot RAM
[1024 bytes of RAM are reserved for Boot Segment]
Boot Segment Program Memory Code Protection
111 = No Boot Segment
110 = Standard security, Small-sized Boot Program Flash
[Boot Segment ends at 0x0003FF in dsPIC33FJ06GS101/102/202,
dsPIC33FJ16GS402/404/502/504, dsPIC33FJ12GP201/202,
dsPIC33FJ12MC201/202 and PIC24HJ12GP201/202.
Boot Segment ends at 0x0007FF in other all other devices.]
101 = Standard security, Medium-sized Boot Program Flash
[Boot Segment ends at 0x0007FF in dsPIC33FJ06GS101/102/202,
dsPIC33FJ16GS402/404/502/504, dsPIC33FJ12GP201/202,
dsPIC33FJ12MC201/202 and PIC24HJ12GP201/202.
Boot Segment ends at 0x001FFF in all other devices.]
100 = Standard security, Large-sized Boot Program Flash
[Boot Segment ends at 0x000FFF in dsPIC33FJ06GS101/102/202,
dsPIC33FJ16GS402/404/502/504, dsPIC33FJ12GP201/202,
dsPIC33FJ12MC201/202 and PIC24HJ12GP201/202.
Boot Segment ends at 0x003FFF in all other devices.]
011 = No Boot Segment
010 = High security, Small-sized Boot Program Flash
[Boot Segment ends at 0x0003FF in dsPIC33FJ06GS101/102/202,
dsPIC33FJ16GS402/404/502/504, dsPIC33FJ12GP201/202,
dsPIC33FJ12MC201/202 and PIC24HJ12GP201/202 devices.
Boot Segment ends at 0x0007FF in all other devices.]
001 = High security, Medium-sized Boot Program Flash
[Boot Segment ends at 0x0007FF in dsPIC33FJ06GS101/102/202,
dsPIC33FJ16GS402/404/502/504, dsPIC33FJ12GP201/202,
dsPIC33FJ12MC201/202 and PIC24HJ12GP201/202 devices.
Boot Segment ends at 0x001FFF in all other devices.]
000 = High security, Large-sized Boot Program Flash
[Boot Segment ends at 0x000FFF in dsPIC33FJ06GS101/102/202,
dsPIC33FJ16GS402/404/502/504, dsPIC33FJ12GP201/202,
dsPIC33FJ12MC201/202 and PIC24HJ12GP201/202 devices.
Boot Segment ends at 0x003FFF in all other devices.]
components, such as oscillator and Watchdog Timer.
The code-protect bits prevent program memory from
being read and written.
The register descriptions for the FBS, FSS, FGS,
FOSCSEL,
Configuration registers are shown in
Note 1: If any of the code-protect bits in FBS,
Description
FSS or FGS is clear, the entire device
must be erased before it can be
reprogrammed.
FOSC,
FWDT,
© 2010 Microchip Technology Inc.
FPOR
Table
and
3-2.
FICD

Related parts for PIC24HJ64GP502T-I/MM