16 Bit MCU 40MIPS 64 KB FLASH 28 QFN-S 6x6mm T/R

PIC24HJ64GP502T-I/MM

Manufacturer Part NumberPIC24HJ64GP502T-I/MM
Description16 Bit MCU 40MIPS 64 KB FLASH 28 QFN-S 6x6mm T/R
ManufacturerMicrochip Technology
SeriesPIC® 24H
PIC24HJ64GP502T-I/MM datasheets
 


Specifications of PIC24HJ64GP502T-I/MM

Core ProcessorPICCore Size16-Bit
Speed40 MIPsConnectivityCAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, DMA, POR, PWM, WDTNumber Of I /o21
Program Memory Size64KB (22K x 24)Program Memory TypeFLASH
Ram Size8K x 8Voltage - Supply (vcc/vdd)3 V ~ 3.6 V
Data ConvertersA/D 10x10b/12bOscillator TypeInternal
Operating Temperature-40°C ~ 85°CPackage / Case28-QFN
Processor SeriesPIC24HJCorePIC
Data Bus Width16 bitData Ram Size8 KB
Interface TypeI2C, SPI, UARTMaximum Clock Frequency40 MHz
Number Of Programmable I/os21Number Of Timers5
Maximum Operating Temperature+ 85 CMounting StyleSMD/SMT
3rd Party Development Tools52713-733, 52714-737, 53276-922, EWDSPICDevelopment Tools By SupplierPG164130, DV164035, DV244005, DV164005, PG164120, DM300027
Minimum Operating Temperature- 40 COn-chip Adc10 bit, 10 Channel / 12 bit, 10 Channel
Lead Free Status / RoHS StatusLead free / RoHS CompliantFor Use WithAC164336 - MODULE SOCKET FOR PM3 28/44QFN
Eeprom Size-  
1
2
3
4
5
6
7
8
9
10
11
Page 11
12
Page 12
13
Page 13
14
Page 14
15
Page 15
16
Page 16
17
Page 17
18
Page 18
19
Page 19
20
Page 20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
Page 12/84

Download datasheet (2Mb)Embed
PrevNext
3.6
Configuration Bits Programming
3.6.1
OVERVIEW
The dsPIC33F/PIC24H devices have Configuration
bits stored in twelve 8-bit Configuration registers,
aligned on even configuration memory address
boundaries. These bits can be set or cleared to select
various device configurations. There are three types of
Configuration bits: system operation bits, code-protect
bits and unit ID bits. The system operation bits
determine the power-on settings for system level
TABLE 3-2:
dsPIC33F/PIC24H CONFIGURATION BITS DESCRIPTION
Bit Field
Register
RBS<1:0>
FBS
Boot Segment Data RAM Code Protection
11 = No RAM is reserved for Boot Segment
10 = Small-Sized Boot RAM
[128 bytes of RAM are reserved for Boot Segment]
01 = Medium-Sized Boot RAM
[256 bytes of RAM are reserved for Boot Segment]
00 = Large-Sized Boot RAM
[1024 bytes of RAM are reserved for Boot Segment]
BSS<2:0>
FBS
Boot Segment Program Memory Code Protection
111 = No Boot Segment
110 = Standard security, Small-sized Boot Program Flash
[Boot Segment ends at 0x0003FF in dsPIC33FJ06GS101/102/202,
dsPIC33FJ16GS402/404/502/504, dsPIC33FJ12GP201/202,
dsPIC33FJ12MC201/202 and PIC24HJ12GP201/202.
Boot Segment ends at 0x0007FF in other all other devices.]
101 = Standard security, Medium-sized Boot Program Flash
[Boot Segment ends at 0x0007FF in dsPIC33FJ06GS101/102/202,
dsPIC33FJ16GS402/404/502/504, dsPIC33FJ12GP201/202,
dsPIC33FJ12MC201/202 and PIC24HJ12GP201/202.
Boot Segment ends at 0x001FFF in all other devices.]
100 = Standard security, Large-sized Boot Program Flash
[Boot Segment ends at 0x000FFF in dsPIC33FJ06GS101/102/202,
dsPIC33FJ16GS402/404/502/504, dsPIC33FJ12GP201/202,
dsPIC33FJ12MC201/202 and PIC24HJ12GP201/202.
Boot Segment ends at 0x003FFF in all other devices.]
011 = No Boot Segment
010 = High security, Small-sized Boot Program Flash
[Boot Segment ends at 0x0003FF in dsPIC33FJ06GS101/102/202,
dsPIC33FJ16GS402/404/502/504, dsPIC33FJ12GP201/202,
dsPIC33FJ12MC201/202 and PIC24HJ12GP201/202 devices.
Boot Segment ends at 0x0007FF in all other devices.]
001 = High security, Medium-sized Boot Program Flash
[Boot Segment ends at 0x0007FF in dsPIC33FJ06GS101/102/202,
dsPIC33FJ16GS402/404/502/504, dsPIC33FJ12GP201/202,
dsPIC33FJ12MC201/202 and PIC24HJ12GP201/202 devices.
Boot Segment ends at 0x001FFF in all other devices.]
000 = High security, Large-sized Boot Program Flash
[Boot Segment ends at 0x000FFF in dsPIC33FJ06GS101/102/202,
dsPIC33FJ16GS402/404/502/504, dsPIC33FJ12GP201/202,
dsPIC33FJ12MC201/202 and PIC24HJ12GP201/202 devices.
Boot Segment ends at 0x003FFF in all other devices.]
DS70152H-page 12
components, such as oscillator and Watchdog Timer.
The code-protect bits prevent program memory from
being read and written.
The register descriptions for the FBS, FSS, FGS,
FOSCSEL,
FOSC,
FWDT,
FPOR
Configuration registers are shown in
Note 1: If any of the code-protect bits in FBS,
FSS or FGS is clear, the entire device
must be erased before it can be
reprogrammed.
Description
© 2010 Microchip Technology Inc.
and
FICD
Table
3-2.