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PIC24HJ64GP502T-I/MM
PIC24HJ64GP502T-I/MM | |
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Manufacturer Part Number | PIC24HJ64GP502T-I/MM |
Description | 16 Bit MCU 40MIPS 64 KB FLASH 28 QFN-S 6x6mm T/R |
Manufacturer | Microchip Technology |
Series | PIC® 24H |
PIC24HJ64GP502T-I/MM datasheets |
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Specifications of PIC24HJ64GP502T-I/MM | |||
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Core Processor | PIC | Core Size | 16-Bit |
Speed | 40 MIPs | Connectivity | CAN, I²C, IrDA, LIN, PMP, SPI, UART/USART |
Peripherals | Brown-out Detect/Reset, DMA, POR, PWM, WDT | Number Of I /o | 21 |
Program Memory Size | 64KB (22K x 24) | Program Memory Type | FLASH |
Ram Size | 8K x 8 | Voltage - Supply (vcc/vdd) | 3 V ~ 3.6 V |
Data Converters | A/D 10x10b/12b | Oscillator Type | Internal |
Operating Temperature | -40°C ~ 85°C | Package / Case | 28-QFN |
Processor Series | PIC24HJ | Core | PIC |
Data Bus Width | 16 bit | Data Ram Size | 8 KB |
Interface Type | I2C, SPI, UART | Maximum Clock Frequency | 40 MHz |
Number Of Programmable I/os | 21 | Number Of Timers | 5 |
Maximum Operating Temperature | + 85 C | Mounting Style | SMD/SMT |
3rd Party Development Tools | 52713-733, 52714-737, 53276-922, EWDSPIC | Development Tools By Supplier | PG164130, DV164035, DV244005, DV164005, PG164120, DM300027 |
Minimum Operating Temperature | - 40 C | On-chip Adc | 10 bit, 10 Channel / 12 bit, 10 Channel |
Lead Free Status / RoHS Status | Lead free / RoHS Compliant | For Use With | AC164336 - MODULE SOCKET FOR PM3 28/44QFN |
Eeprom Size | - |
PIC24HJ12GP201-ISO PDF datasheetPIC24HJ32GP302-ISO PDF datasheet #2PIC24HJ32GP302-ISO PDF datasheet #3PIC24HJ32GP302-ISO PDF datasheet #4
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APPENDIX D:
CHECKSUM
COMPUTATION
TABLE D-1:
CHECKSUM COMPUTATION
Read Code
Device
Protection
dsPIC33FJ06GS101
Disabled
Enabled
dsPIC33FJ06GS102
Disabled
Enabled
dsPIC33FJ06GS202
Disabled
Enabled
dsPIC33FJ16GS402
Disabled
Enabled
dsPIC33FJ16GS404
Disabled
Enabled
dsPIC33FJ16GS502
Disabled
Enabled
dsPIC33FJ16GS504
Disabled
Enabled
dsPIC33FJ12GP201
Disabled
Enabled
dsPIC33FJ12GP202
Disabled
Enabled
dsPIC33FJ16GP304
Disabled
Enabled
Item Description:
SUM(a:b) = Byte sum of locations a to b inclusive (all 3 bytes of code memory)
CFGB = Configuration Block (masked) = Byte sum of ((FBS & 0x0F) + (FGS & 0x07) + (FOSCSEL & 0x87) +
(FOSC & 0xE7) + (FWDT & 0xDF) + (FPOR & 0x0F) + (FICD & 0xE3))
(for dsPIC33FJ06GS101/102/202 and dsPIC33FJ16GS402/404/502/504 devices)
CFGB = Configuration Block (masked) = Byte sum of ((FBS & 0x0F) + (FGS & 0x07) + (FOSCSEL & 0x87) +
(FOSC & 0xE7) + (FWDT & 0xDF) + (FPOR & 0xF7) + (FICD & 0xE3))
(for dsPIC33FJ12GP201/202, dsPIC33FJ12MC201/202, PIC24HJ12GP201/202, dsPIC33FJ32GP202/204,
dsPIC33FJ32MC202/204, PIC24HJ32GP202/204, dsPIC33FJ16GP304, dsPIC33FJ16MC304, PIC24HJ16GP304,
dsPIC33FJ32GP302/304, dsPIC33FJ32MC302/304 and PIC24HJ32GP302/304 devices)
CFGB = Configuration Block (masked) = Byte sum of ((FBS & 0xCF) + (FSS & 0xCF) + (FGS & 0x07) +
(FOSCSEL & 0x87) + (FOSC & 0xE7) + (FWDT & 0xDF) + (FPOR & 0xF7) + (FICD & 0xE3))
(for dsPIC33FJ64GP202/204, dsPIC33F64MC202/204, PIC24HJ64GP202/204, dsPIC33FJ64GP802/804,
dsPIC33FJ64MC802/804, PIC24HJ64GP502/504, dsPIC33FJ128GP202/204, dsPIC33FJ128MC202/204,
PIC24HJ128GP202/204, dsPIC33FJ128GP802/804, dsPIC33FJ128MC802/804 and PIC24HJ128GP502/504 devices)
CFGB = Configuration Block (masked) = Byte sum of ((FBS & 0xCF) + (FSS & 0xCF) + (FGS & 0x07) +
(FOSCSEL & 0xA7) + (FOSC & 0xC7) + (FWDT & 0xDF) + (FPOR & 0xE7) + (FICD & 0xE3))
(for dsPIC33FJXXXGPX06/X08/X10, dsPIC33FJ64GPX06A/X08A/X10A, dsPIC33FJ128GPX06A/X08A/X10A,
dsPIC33FJXXXMCX06/X08/X10, dsPIC33FJ64MCX06A/X08A/X10A, dsPIC33FJ128MCX06A/X08A/X10A,
PIC24HJXXXGPX06/X08/X10, PIC24HJ64GPX06A/X08A/X10A and PIC24HJ128GPX06A/X08A/X10A devices)
CFGB = Configuration Block (masked) = Byte sum of ((FBS & 0xCF) + (FSS & 0xCF) + (FGS & 0x07) +
(FOSCSEL & 0xA7) + (FOSC & 0xC7) + (FWDT & 0xFF) + (FPOR & 0xE7) + (FICD & 0xE3))
(for dsPIC33FJ256GP506A/510A/710A, dsPIC33FJ256MC510A/710A and PIC24HJ256GP206A/210A/610A devices)
CFGB = Configuration Block (masked) = Byte sum of ((FBS & 0x0F) + (FGS & 0x07) + (FOSCSEL & 0x87) +
(FOSC & 0xC7) + (FWDT & 0xDF) + (FPOR & 0x67) + (FICD & 0xE3))
(for dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610 devices)
© 2010 Microchip Technology Inc.
Checksum Computation
CFGB + SUM(0:000FFF)
CFGB
CFGB + SUM(0:000FFF)
CFGB
CFGB + SUM(0:000FFF)
CFGB
CFGB + SUM(0:002BFF)
CFGB
CFGB + SUM(0:002BFF)
CFGB
CFGB + SUM(0:002BFF)
CFGB
CFGB + SUM(0:002BFF)
CFGB
CFGB + SUM(0:001FFF)
CFGB
CFGB + SUM(0:001FFF)
CFGB
CFGB + SUM(0:002BFF)
CFGB
Value with
Erased
0xAAAAAA at 0x0
Value
and Last
Code Address
0xEB55
0xE957
0x0353
0x0353
0xEB55
0xE957
0x0353
0x0353
0xEB55
0xE957
0x0353
0x0353
0xC155
0xBF57
0x0353
0x0353
0xC155
0xBF57
0x0353
0x0353
0xC155
0xBF57
0x0353
0x0353
0xC155
0xBF57
0x0353
0x0353
0xD43D
0xD23F
0x043B
0x043B
0xD43D
0xD23F
0x043B
0x043B
0xC23D
0xC03F
0x043B
0x043B
DS70152H-page 65
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