16 Bit MCU 40MIPS 64 KB FLASH 28 QFN-S 6x6mm T/R

PIC24HJ64GP502T-I/MM

Manufacturer Part NumberPIC24HJ64GP502T-I/MM
Description16 Bit MCU 40MIPS 64 KB FLASH 28 QFN-S 6x6mm T/R
ManufacturerMicrochip Technology
SeriesPIC® 24H
PIC24HJ64GP502T-I/MM datasheets
 

Specifications of PIC24HJ64GP502T-I/MM

Core ProcessorPICCore Size16-Bit
Speed40 MIPsConnectivityCAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, DMA, POR, PWM, WDTNumber Of I /o21
Program Memory Size64KB (22K x 24)Program Memory TypeFLASH
Ram Size8K x 8Voltage - Supply (vcc/vdd)3 V ~ 3.6 V
Data ConvertersA/D 10x10b/12bOscillator TypeInternal
Operating Temperature-40°C ~ 85°CPackage / Case28-QFN
Processor SeriesPIC24HJCorePIC
Data Bus Width16 bitData Ram Size8 KB
Interface TypeI2C, SPI, UARTMaximum Clock Frequency40 MHz
Number Of Programmable I/os21Number Of Timers5
Maximum Operating Temperature+ 85 CMounting StyleSMD/SMT
3rd Party Development Tools52713-733, 52714-737, 53276-922, EWDSPICDevelopment Tools By SupplierPG164130, DV164035, DV244005, DV164005, PG164120, DM300027
Minimum Operating Temperature- 40 COn-chip Adc10 bit, 10 Channel / 12 bit, 10 Channel
Lead Free Status / RoHS StatusLead free / RoHS CompliantFor Use WithAC164336 - MODULE SOCKET FOR PM3 28/44QFN
Eeprom Size-  
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Page 8/84

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3.0
DEVICE PROGRAMMING –
ENHANCED ICSP
This section discusses programming the device
through Enhanced ICSP and the programming
executive. The programming executive resides in
executive memory (separate from code memory) and is
executed when Enhanced ICSP Programming mode is
entered. The programming executive provides the
mechanism for the programmer (host device) to
program
and
verify
the
dsPIC33F/PIC24H
Programming Specification family devices using a
simple command set and communication protocol.
There are several basic functions provided by the
programming executive:
• Read Memory
• Erase Memory
• Program Memory
• Blank Check
• Read Executive Firmware Revision
The programming executive performs the low-level
tasks required for erasing, programming and verifying
a device. This allows the programmer to program the
device by issuing the appropriate commands and data.
Table 3-1
summarizes the commands. A detailed
description for each command is provided in
Section 4.2 “Programming Executive
TABLE 3-1:
COMMAND SET SUMMARY
Command
Description
Sanity check.
SCHECK
Read Configuration registers or
READC
Device ID registers.
Read code memory.
READP
Program a Configuration
PROGC
register and verify.
Program one row of code
PROGP
memory and verify.
Erase Page command.
ERASEP
CRCP SIGNATURE Performs CRC on memory.
Query to check whether code
QBLANK
memory is blank.
Query the software version.
QVER
The programming executive uses the device’s data
RAM for variable storage and program execution. After
the programming executive is run, no assumptions
should be made about the contents of data RAM.
DS70152H-page 8
3.1
Overview of the Programming
Process
Figure 3-1
illustrates the high-level overview of the
programming process. After entering Enhanced ICSP
mode, the programming executive is verified. Next, the
device is erased. Then, the code memory is
programmed, followed by the nonvolatile device
Configuration registers. Code memory (including the
Configuration registers) is then verified to ensure that
programming was successful.
After the programming executive has been verified
in memory (or loaded if not present), the dsPIC33F/
PIC24H
Programming
programmed using the command set shown in
Table
3-1.
FIGURE 3-1:
Commands”.
Program Configuration Bits
Specification
can
HIGH-LEVEL ENHANCED
ICSP™ PROGRAMMING
FLOW
Start
Perform Bulk Erase
(using ICSP™)
Program PE Into
Executive Memory
(using ICSP)
Enter Enhanced ICSP
Program Memory
Verify Program
Verify Configuration Bits
Exit Enhanced ICSP
End
© 2010 Microchip Technology Inc.
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