PIC24HJ64GP510A-E/PF Microchip Technology, PIC24HJ64GP510A-E/PF Datasheet - Page 210

16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY

PIC24HJ64GP510A-E/PF

Manufacturer Part Number
PIC24HJ64GP510A-E/PF
Description
16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ64GP510A-E/PF

Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24HJ64GP510A-E/PF
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
PIC24HJ64GP510A-E/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC24HJXXXGPX06A/X08A/X10A
REGISTER 20-1:
DS70592B-page 210
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9-8
bit 7-5
bit 4
R/W-0
ADON
R/W-0
ADON: ADC Operating Mode bit
1 = ADC module is operating
0 = ADC module is off
Unimplemented: Read as ‘0’
ADSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
ADDMABM: DMA Buffer Build Mode bit
1 = DMA buffers are written in the order of conversion. The module will provide an address to the DMA
0 = DMA buffers are written in Scatter/Gather mode. The module will provide a scatter/gather address
Unimplemented: Read as ‘0’
AD12B: 10-Bit or 12-Bit Operation Mode bit
1 = 12-bit, 1-channel ADC operation
0 = 10-bit, 4-channel ADC operation
FORM<1:0>: Data Output Format bits
For 10-bit operation:
11 = Reserved
10 = Reserved
01 = Signed integer (D
00 = Integer (D
For 12-bit operation:
11 = Reserved
10 = Reserved
01 = Signed Integer (D
00 = Integer (D
SSRC<2:0>: Sample Clock Source Select bits
111 = Internal counter ends sampling and starts conversion (auto-convert)
110 = Reserved
101 = Reserved
100 = GP timer (Timer5 for ADC1, Timer3 for ADC2) compare ends sampling and starts conversion
011 = Reserved
010 = GP timer (Timer3 for ADC1, Timer5 for ADC2) compare ends sampling and starts conversion
001 = Active transition on INT0 pin ends sampling and starts conversion
000 = Clearing sample bit ends sampling and starts conversion
Unimplemented: Read as ‘0’
SSRC<2:0>
R/W-0
channel that is the same as the address used for the non-DMA stand-alone buffer
to the DMA channel, based on the index of the analog input and the size of the DMA buffer
U-0
ADxCON1: ADCx CONTROL REGISTER 1(where x = 1 or 2)
HC = Cleared by hardware
W = Writable bit
‘1’ = Bit is set
OUT
OUT
ADSIDL
R/W-0
R/W-0
= 0000 00dd dddd dddd)
= 0000 dddd dddd dddd)
OUT
OUT
= ssss sssd dddd dddd, where s = .NOT.d<9>)
= ssss sddd dddd dddd, where s = .NOT.d<11>)
ADDMABM
R/W-0
Preliminary
U-0
HS = Set by hardware
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SIMSAM
R/W-0
U-0
AD12B
R/W-0
R/W-0
ASAM
 2009 Microchip Technology Inc.
x = Bit is unknown
HC,HS
R/W-0
R/W-0
SAMP
FORM<1:0>
HC, HS
R/W-0
DONE
R/C-0
bit 8
bit 0

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