PIC24HJ64GP510A-E/PF Microchip Technology, PIC24HJ64GP510A-E/PF Datasheet - Page 298

• Manufacturer Part Number: PIC24HJ64GP510A-E/PF
• Description: 16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP510A-E/PF

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (22K x 24)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC24HJXXXGPX06A/X08A/X10A
F
Flash Program Memory....................................................... 61
Flexible Configuration ....................................................... 219
FSCM
H
High Temperature Electrical Characteristics..................... 275
I
I/O Ports ............................................................................ 145
I
I
In-Circuit Debugger ........................................................... 226
In-Circuit Emulation........................................................... 219
In-Circuit Serial Programming (ICSP) ....................... 219, 226
Input Capture
Input Change Notification Module ..................................... 146
Instruction Addressing Modes............................................. 55
Instruction Set
Instruction-Based Power-Saving Modes ........................... 137
Internal RC Oscillator
Internet Address................................................................ 301
Interrupt Control and Status Registers................................ 77
Interrupt Setup Procedures ............................................... 116
Interrupt Vector Table (IVT) ................................................ 73
Interrupts Coincident with Power Save Instructions.......... 138
J
JTAG Boundary Scan Interface ........................................ 219
DS70592B-page 298
2
2
C
C Module
Control Registers ........................................................ 62
Operations .................................................................. 62
Programming Algorithm .............................................. 64
RTSP Operation.......................................................... 62
Table Instructions........................................................ 61
Delay for Crystal and PLL Clock Sources ................... 71
Device Resets ............................................................. 71
Parallel I/O (PIO)....................................................... 145
Write/Read Timing .................................................... 146
Operating Modes ...................................................... 167
Registers ................................................................... 167
I2C1 Register Map ...................................................... 42
I2C2 Register Map ...................................................... 42
Registers ................................................................... 156
File Register Instructions ............................................ 55
Fundamental Modes Supported.................................. 56
MCU Instructions ........................................................ 55
Move and Accumulator Instructions ............................ 56
Other Instructions........................................................ 56
Overview ................................................................... 229
Summary................................................................... 227
Idle ............................................................................ 138
Sleep ......................................................................... 137
Use with WDT ........................................................... 225
IECx ............................................................................ 77
IFSx............................................................................. 77
INTCON1 .................................................................... 77
INTCON2 .................................................................... 77
INTTREG .................................................................... 77
IPCx ............................................................................ 77
Initialization ............................................................... 116
Interrupt Disable........................................................ 116
Interrupt Service Routine .......................................... 116
Trap Service Routine ................................................ 116
Preliminary
M
Memory Organization ......................................................... 31
Microchip Internet Web Site.............................................. 301
Modes of Operation
MPLAB ASM30 Assembler, Linker, Librarian ................... 236
MPLAB ICD 3 In-Circuit Debugger System ...................... 237
MPLAB Integrated Development Environment Software.. 235
MPLAB PM3 Device Programmer .................................... 238
MPLAB REAL ICE In-Circuit Emulator System ................ 237
MPLINK Object Linker/MPLIB Object Librarian ................ 236
Multi-Bit Data Shifter........................................................... 30
N
NVM Module
O
Open-Drain Configuration................................................. 146
Output Compare ............................................................... 157
P
Packaging ......................................................................... 285
Peripheral Module Disable (PMD) .................................... 138
PICkit 2 Development Programmer/Debugger and PICkit 2
PICkit 3 In-Circuit Debugger/Programmer and PICkit 3 Debug
Pinout I/O Descriptions (table)............................................ 19
PMD Module
POR and Long Oscillator Start-up Times ........................... 71
PORTA
PORTB
PORTC
PORTD
PORTE
PORTF
PORTG
Power-Saving Features .................................................... 137
Program Address Space..................................................... 31
Disable...................................................................... 183
Initialization ............................................................... 183
Listen All Messages.................................................. 183
Listen Only................................................................ 183
Loopback .................................................................. 183
Normal Operation ..................................................... 183
Register Map .............................................................. 54
Details....................................................................... 288
Marking ..................................................................... 285
Debug Express ......................................................... 238
Express..................................................................... 237
Register Map .............................................................. 54
Register Map .............................................................. 52
Register Map .............................................................. 52
Register Map .............................................................. 52
Register Map .............................................................. 52
Register Map .............................................................. 53
Register Map .............................................................. 53
Register Map .............................................................. 53
Clock Frequency and Switching ............................... 137
Construction ............................................................... 57
Data Access from Program Memory Using Program
Data Access from Program Memory Using Table Instruc-
Data Access from, Address Generation ..................... 58
Memory Map............................................................... 31
Table Read Instructions
Visibility Operation ...................................................... 60
Space Visibility ................................................... 60
tions .................................................................... 59
TBLRDH ............................................................. 59
TBLRDL.............................................................. 59
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