16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY

PIC24HJ64GP510A-E/PF

Manufacturer Part NumberPIC24HJ64GP510A-E/PF
Description16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY
ManufacturerMicrochip Technology
SeriesPIC® 24H
PIC24HJ64GP510A-E/PF datasheets
 


Specifications of PIC24HJ64GP510A-E/PF

Core ProcessorPICCore Size16-Bit
Speed40 MIPsConnectivityCAN, I²C, IrDA, LIN, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, DMA, POR, PWM, WDTNumber Of I /o85
Program Memory Size64KB (22K x 24)Program Memory TypeFLASH
Ram Size8K x 8Voltage - Supply (vcc/vdd)3 V ~ 3.6 V
Data ConvertersA/D 32x10b/12bOscillator TypeInternal
Operating Temperature-40°C ~ 125°CPackage / Case100-TQFP, 100-VQFP
Lead Free Status / RoHS StatusLead free / RoHS CompliantEeprom Size-
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2.4
Memory Map
The program memory map extends from 0x0 to
0xFFFFFE. Code storage is located at the base of the
memory map and supports up to 88K instructions
(about 256 Kbytes).
Table 2-2
shows the program
memory size and number of erase and program blocks
present in each device variant. Each erase block or
page contains 512 instructions and each program block
or row, contains 64 instructions.
Locations 0x800000 through 0x800FFE are reserved
for executive code memory. This region stores the
programming
executive
and
the
executive. The programming executive is used for
TABLE 2-2:
CODE MEMORY SIZE
User Memory Address
dsPIC33F/PIC24H Device
(Instruction Words)
dsPIC33FJ06GS101
0x000FFE (2K)
dsPIC33FJ06GS102
0x000FFE (2K)
dsPIC33FJ06GS202
0x000FFE (2K)
dsPIC33FJ16GS402
0x002BFE (6K)
dsPIC33FJ16GS404
0x002BFE (6K)
dsPIC33FJ16GS502
0x002BFE (6K)
dsPIC33FJ16GS504
0x002BFE (6K)
dsPIC33FJ12GP201
0x001FFE (4K)
dsPIC33FJ12GP202
0x001FFE (4K)
dsPIC33FJ16GP304
0x002BFE (6K)
dsPIC33FJ32GP202
0x0057FE (11K)
dsPIC33FJ32GP204
0x0057FE (11K)
dsPIC33FJ32GP302
0x0057FE (11K)
dsPIC33FJ32GP304
0x0057FE (11K)
dsPIC33FJ64GP202
0x00ABFE (22K)
dsPIC33FJ64GP204
0x00ABFE (22K)
dsPIC33FJ64GP206
0x00ABFE (22K)
dsPIC33FJ64GP306
0x00ABFE (22K)
dsPIC33FJ64GP310
0x00ABFE (22K)
dsPIC33FJ64GP706
0x00ABFE (22K)
dsPIC33FJ64GP708
0x00ABFE (22K)
dsPIC33FJ64GP710
0x00ABFE (22K)
dsPIC33FJ64GP802
0x00ABFE (22K)
dsPIC33FJ64GP804
0x00ABFE (22K)
dsPIC33FJ128GP202
0x0157FE (44K)
dsPIC33FJ128GP204
0x0157FE (44K)
dsPIC33FJ128GP206
0x0157FE (44K)
dsPIC33FJ128GP306
0x0157FE (44K)
dsPIC33FJ128GP310
0x0157FE (44K)
dsPIC33FJ128GP706
0x0157FE (44K)
dsPIC33FJ128GP708
0x0157FE (44K)
© 2010 Microchip Technology Inc.
device programming and the debug executive is
used for in-circuit debugging. This region of memory
cannot be used to store user code.
Locations 0xF80000 through 0xF80017 are reserved
for the device Configuration registers.
Locations 0xFF0000 and 0xFF0002 are reserved for
the Device ID Word registers. These bits can be used
by the programmer to identify which device type is
being programmed. They are described in
“Device
ID”. The Device ID registers read out
normally, even after code protection is applied.
debugging
Figure 2-3
illustrates the memory map for the
dsPIC33F/PIC24H family variants.
Limit
Write Blocks
Erase Blocks
32
32
32
88
88
88
88
64
64
88
176
176
176
176
344
344
344
344
344
344
344
344
344
344
688
688
688
688
688
688
688
Section 7.0
Executive Memory
Address Limit
(Instruction Words)
4
0x8007FE (1K)
4
0x8007FE (1K)
4
0x8007FE (1K)
11
0x8007FE (1K)
11
0x8007FE (1K)
11
0x8007FE (1K)
11
0x8007FE (1K)
8
0x8007FE (1K)
8
0x8007FE (1K)
11
0x800FFE (2K)
22
0x800FFE (2K)
22
0x800FFE (2K)
22
0x800FFE (2K)
22
0x800FFE (2K)
43
0x800FFE (2K)
43
0x800FFE (2K)
43
0x800FFE (2K)
43
0x800FFE (2K)
43
0x800FFE (2K)
43
0x800FFE (2K)
43
0x800FFE (2K)
43
0x800FFE (2K)
43
0x800FFE (2K)
43
0x800FFE (2K)
86
0x800FFE (2K)
86
0x800FFE (2K)
86
0x800FFE (2K)
86
0x800FFE (2K)
86
0x800FFE (2K)
86
0x800FFE (2K)
86
0x800FFE (2K)
DS70152H-page 3