PIC24HJ64GP510A-E/PF Microchip Technology, PIC24HJ64GP510A-E/PF Datasheet - Page 43

16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY

PIC24HJ64GP510A-E/PF

Manufacturer Part Number
PIC24HJ64GP510A-E/PF
Description
16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ64GP510A-E/PF

Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
Table 5-7
shows the ICSP programming details for
clearing the Configuration registers. In Step 1, the
Reset vector is exited. In Step 2, the write pointer (W7)
is loaded with 0x0000, which is the original destination
address (in TBLPAG, 0xF8 of program memory). In
Step 3, the NVMCON is set to program one
Configuration register. In Step 4, the TBLPAG register
is initialized to 0xF8 for writing to the Configuration
registers. In Step 5, the value to write to each
Configuration register is loaded to W0. In Step 6, the
Configuration register data is written to the write latch
using the TBLWTL instruction. In Steps 7 and 8, the
programming cycle is initiated. In Step 9, the internal
PC is set to 0x200 as a safety measure to prevent the
PC from incrementing into unimplemented memory.
Lastly, Steps 4-9 are repeated until all twelve
Configuration registers are written.
© 2010 Microchip Technology Inc.
DS70152H-page 43

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