PIC24HJ64GP510A-E/PF Microchip Technology, PIC24HJ64GP510A-E/PF Datasheet - Page 50

16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY

PIC24HJ64GP510A-E/PF

Manufacturer Part Number
PIC24HJ64GP510A-E/PF
Description
16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ64GP510A-E/PF

Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.0
6.1
If it is determined that the programming executive is not
present in executive memory (as described in
Section 3.2 “Confirming the Presence of the
Programming
into executive memory using ICSP, as described in
Section 5.0 “Device Programming –
TABLE 6-1:
DS70152H-page 50
Step 1: Exit the Reset vector and erase executive memory.
Step 2: Initialize the NVMCON to erase a page of executive memory.
Step 3: Initiate the erase cycle, wait for erase to complete and make sure WR bit is clear.
Step 4: Repeat Step 3 to erase all pages of executive memory (incrementing the page erase pointer, i.e., W1 pointer
should be incremented by 0x400 to point to the second page).
Step 5: Initialize the NVMCON to program 64 instruction words.
Step 6: Initialize TBLPAG and the write pointer (W7).
Command
(Binary)
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
0000
0000
0000
0000
0000
0000
PROGRAMMING THE
PROGRAMMING EXECUTIVE
TO MEMORY
Overview
Executive”), it must be programmed
PROGRAMMING THE PROGRAMMING EXECUTIVE
040200
040200
000000
24042A
883B0A
200080
880190
200001
000000
BB0881
000000
000000
A8E761
000000
000000
000000
000000
803B00
883C20
000000
<VISI>
24001A
883B0A
200800
880190
EB0380
000000
(Hex)
Data
GOTO
GOTO
NOP
MOV
MOV
MOV
MOV
MOV
NOP
TBLWTL W1, [W1]
NOP
NOP
BSET
NOP
NOP
NOP
NOP
Externally time ‘P12’ msec (see
Timing
complete.
MOV
MOV
NOP
Clock out contents of VISI register. Repeat instruction until the WR bit is clear.
MOV
MOV
MOV
MOV
CLR
NOP
ICSP”.
Requirements”) to allow sufficient time for the Page Erase operation to
W0, VISI
0x200
#0x4042, W10
W10, NVMCON
#0x80, W0
W0, TBLPAG
#0x00, W1
NVMCON, #15
#0x4001, W10
W10, NVMCON
#0x80, W0
W0, TBLPAG
W7
0x200
NVMCON, W0
Storing the programming executive to executive
memory is similar to normal programming of code
memory. Namely, the executive memory must first be
erased, and then the programming executive must be
programmed 64 words at a time. This control flow is
summarized in
Note:
Section 8.0 “AC/DC Characteristics and
Description
The
always
programmed, as described in
Table
programming
6-1.
be
© 2010 Microchip Technology Inc.
erased
executive
before
Table
it
6-1.
must
is

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