16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY

PIC24HJ64GP510A-E/PF

Manufacturer Part NumberPIC24HJ64GP510A-E/PF
Description16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY
ManufacturerMicrochip Technology
SeriesPIC® 24H
PIC24HJ64GP510A-E/PF datasheets
 

Specifications of PIC24HJ64GP510A-E/PF

Core ProcessorPICCore Size16-Bit
Speed40 MIPsConnectivityCAN, I²C, IrDA, LIN, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, DMA, POR, PWM, WDTNumber Of I /o85
Program Memory Size64KB (22K x 24)Program Memory TypeFLASH
Ram Size8K x 8Voltage - Supply (vcc/vdd)3 V ~ 3.6 V
Data ConvertersA/D 32x10b/12bOscillator TypeInternal
Operating Temperature-40°C ~ 125°CPackage / Case100-TQFP, 100-VQFP
Lead Free Status / RoHS StatusLead free / RoHS CompliantEeprom Size-
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8.0
AC/DC CHARACTERISTICS
AND TIMING REQUIREMENTS
Table 8-1
lists the AC/DC characteristics and timing
requirements.
TABLE 8-1:
AC/DC CHARACTERISTICS AND TIMING REQUIREMENTS
Standard Operating Conditions
Operating Temperature: –40ºC-85ºC. Programming at 25ºC is recommended.
Param
Symbol
Characteristic
No.
D111
V
Supply Voltage During Programming
DD
D112
I
Programming Current on MCLR
PP
D113
I
Supply Current During Programming
DDP
D031 V
Input Low Voltage
IL
D041 V
Input High Voltage
IH
D080 V
Output Low Voltage
OL
D090 V
Output High Voltage
OH
D012 C
Capacitive Loading on I/O pin (PGDx)
IO
D013 C
Filter Capacitor Value on V
F
P1
T
Serial Clock (PGCx) Period (ICSP™)
PGC
P1
T
Serial Clock (PGCx) Period (Enhanced
PGCL
ICSP)
P1A
T
Serial Clock (PGCx) Low Time (ICSP)
PGCL
P1A
T
Serial Clock (PGCx) Low Time (Enhanced
PGCL
ICSP)
P1B
T
Serial Clock (PGCx) High Time (ICSP)
PGCH
P1B
T
Serial Clock (PGCx) High Time (Enhanced
PGCH
ICSP)
P2
T
1
Input Data Setup Time to Serial Clock ↓
SET
Input Data Hold Time from PGCx ↓
P3
T
1
HLD
P4
T
1
Delay between 4-bit Command and
DLY
Command Operand
P4A
T
1
Delay between Command Operand and
DLY
A
Next 4-bit Command
Delay between Last PGCx ↓ of Command
P5
T
2
DLY
to First PGCx ↑ of Read of Data Word
↑ Setup Time to MCLR ↑
P6
T
2
V
SET
DD
P7
T
2
Input Data Hold Time from MCLR ↑
HLD
Delay between Last PGCx ↓ of Command
P8
T
3
DLY
Byte to PGDx ↑ by Programming
Executive
P9a
T
4
Programming Executive Command
DLY
Processing Time
Note 1: V
must also be supplied to the AV
DD
±0.3V of V
and V
, respectively.
DD
SS
2: Time depends on the FRC accuracy and the value of the FRC Oscillator tuning register. Refer to
“Electrical Characteristics” section in the specific device data sheet.
© 2010 Microchip Technology Inc.
Min
Max
3.0
3.60
5
2
V
0.2 V
SS
DD
0.8 V
V
DD
DD
0.6
V
– 0.7
DD
50
1
10
CAP
200
500
80
200
80
200
15
15
40
40
20
100
25
12
10
pins during programming. AV
DD
DD
Units
Conditions
(1)
V
Normal programming
μA
mA
V
V
V
I
= 8.5 mA @ 3.6V
OL
V
I
= -3.0 mA @ 3.6V
OH
pF
To meet AC specifications
μF
Required for controller core
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
μs
μs
and AV
should always be within
SS
DS70152H-page 59