STM8AF6268TAY STMicroelectronics, STM8AF6268TAY Datasheet
STM8AF6268TAY
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STM8AF6268TAY Summary of contents
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Automotive 8-bit MCU, with Kbytes Flash, data EEPROM, Features ■ Core – Max MHz CPU – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at ...
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Contents Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STM8AF61xx, STM8AF62xx 5.7.4 5.7.5 5.8 Analog-to-digital converter (ADC 5.9 ...
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Contents 10.3.7 10.3.8 10.3.9 10.3.10 I 10.3.11 10-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STM8AF61xx, STM8AF62xx List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of tables Table 47. Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STM8AF61xx, STM8AF62xx List of figures Figure 1. STM8A block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Introduction 1 Introduction This datasheet refers to the STM8AF61xx (STM8AF612x, STM8AF614x, STM8AF6166, and STM8AF6168) and STM8AF62xx products with Kbytes of Flash program memory. The STM8AF61xx and STM8AF62xx are hereafter referred to as the STM8AF61xx and STM8AF62xx. In ...
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STM8AF61xx, STM8AF62xx 2 Description The STM8AF61xx and STM8AF62xx automotive 8-bit microcontrollers offer from Kbytes of Flash program memory and integrated true data EEPROM. They are referred to as medium density STM8A devices in the STM8S and STM8A ...
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Product line-up 3 Product line-up ² Table 2. STM8AF62xx product line-up Order code Package STM8AF6268 LQFP48 (7x7) STM8AF6248 STM8AF6266 LQFP32 STM8AF6246 (7x7) STM8AF6226 STM8AF6266 VFQFPN32 STM8AF6246 ² Table 3. STM8AF/H61xx product line-up Order code Package STM8AF/H6168 LQFP48 (7x7) STM8AF/H6148 STM8AF/H6166 ...
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STM8AF61xx, STM8AF62xx 4 Block diagram Figure 1. STM8A block diagram Reset Single wire debug interf. Master/slave automatic synchronization 400 Kbit/s 10 Mbit/s 16 channels Reset block Clock controller Reset Detector POR PDR Clock to peripherals and core STM8A CORE Debug/SWIM ...
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Product overview 5 Product overview This section is intended to describe the family features that are actually implemented in the products covered by this datasheet. For more detailed information on each feature please refer to the STM8S and STM8A microcontroller ...
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STM8AF61xx, STM8AF62xx 5.2 Single wire interface module (SWIM) and debug module (DM) 5.2.1 SWIM The single wire interface module, SWIM, together with an integrated debug module, permits non-intrusive, real-time in-circuit debugging and fast memory programming. The interface can be activated ...
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Product overview 5.4.2 Write protection (WP) Write protection in application mode is intended to avoid unintentional overwriting of the memory. The write protection can be removed temporarily by executing a specific sequence in the user software. 5.4.3 Protection of user ...
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STM8AF61xx, STM8AF62xx byte area. This keyword must be entered via the SWIM interface to temporarily unlock the device. If desired, the temporary unlock mechanism can be permanently disabled by the user through OPT6/NOPT6 option bytes. 5.5 Clock controller The clock ...
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Product overview 5.5.3 128 kHz low-speed internal RC oscillator (LSI) The frequency of this clock is 128 kHz and it is independent from the main clock. It drives the independent watchdog or the AWU wakeup timer. In systems which do ...
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STM8AF61xx, STM8AF62xx 5.6 Low-power operating modes For efficient power management, the application can be put in one of four different low power modes. You can configure each mode to obtain the best compromise between lowest power consumption, fastest start-up time ...
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Product overview 5.7 Timers 5.7.1 Watchdog timers The watchdog system is based on two independent timers providing maximum security to the applications. The watchdog timer activity is controlled by the application program or option bytes. Once the watchdog is activated, ...
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STM8AF61xx, STM8AF62xx Table 5. Advanced control and general purpose timers Counter Counter Timer width type TIM1 16-bit Up/down 1 to 65536 TIM2 16-bit Up TIM3 16-bit Up TIM1: Advanced control timer This is a high-end timer designed for a wide ...
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Product overview 5.8 Analog-to-digital converter (ADC) The STM8A products described in this datasheet contain a 10-bit successive approximation ADC with multiplexed input channels, depending on the package. The ADC name differs between the datasheet and the STM8A/S ...
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STM8AF61xx, STM8AF62xx 5.9.1 Serial peripheral interface (SPI) The devices covered by this datasheet contain one SPI. The SPI is available on all the supported packages. ● Maximum speed: 10 Mbit ● Full duplex synchronous transfers ● Simplex synchronous ...
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Product overview – Successful address/data communication – Error condition – Wakeup from Halt ● Wakeup from Halt on address detection in slave mode 5.9.3 Universal asynchronous receiver/transmitter with LIN support (LINUART) The devices covered by this datasheet contain one LINUART ...
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STM8AF61xx, STM8AF62xx – Address bit (MSB) – Idle line 5.10 Input/output specifications The product features four different I/O types: ● Standard I/O 2 MHz ● Fast I MHz ● High sink 8 mA, 2 MHz ● True ...
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Pinouts and pin description 6 Pinouts and pin description 6.1 Package pinouts Figure 3. VFQFPN/LQFP 32-pin pinout 1. (HS) high sink capability. 24/ NRST OSCIN/PA1 2 OSCOUT/PA2 3 22 ...
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STM8AF61xx, STM8AF62xx Figure 4. LQFP 48-pin pinout 2. (HS) high sink capability. Table 9. Legend/abbreviation Type Level Output speed Port and control configuration Reset state NRST 1 OSCIN/PA1 ...
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Pinouts and pin description Table 10. STM8AF61xx/62xx (32 Kbytes) microcontroller pin description Pin number Pin name 1 1 NRST I/O ( PA1/OSCIN I PA2/OSCOUT I SSIO_1 ...
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STM8AF61xx, STM8AF62xx Table 10. STM8AF61xx/62xx (32 Kbytes) microcontroller pin description Pin number Pin name 23 - PE7/AIN8 I PE6/AIN9 I PE5/SPI_NSS I PC1/TIM1_CH1 I PC2/TIM1_CH2 I ...
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Pinouts and pin description Table 10. STM8AF61xx/62xx (32 Kbytes) microcontroller pin description Pin number Pin name PD6 I/O X LINUART_RX ( PD7/TLI I Refer to Table 9 for the definition of the abbreviations. 2. ...
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STM8AF61xx, STM8AF62xx 7 Memory and register map 7.1 Memory map Figure 5. Register and memory map of STM8A products Flash Program memory end Table 11. Memory model for the devices covered in this datasheet Flash program memory size 32K 16K ...
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Memory and register map 7.2 Register map In this section the memory and register map of the devices covered by this datasheet is described. For a detailed description of the functionality of the registers, refer to the reference manual RM0016. ...
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STM8AF61xx, STM8AF62xx Table 12. I/O port hardware register map (continued) Address Block 0x00 501E 0x00 501F 0x00 5020 Port G 0x00 5021 0x00 5022 1. Depends on the external circuitry. Table 13. General hardware register map Address 0x00 505A 0x00 ...
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Memory and register map Table 13. General hardware register map (continued) Address 0x00 50C3 0x00 50C4 0x00 50C5 0x00 50C6 0x00 50C7 0x00 50C8 0x00 50C9 0x00 50CA 0x00 50CB 0x00 50CC 0x00 50CD 0x00 50CE to 0x00 50D0 0x00 ...
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STM8AF61xx, STM8AF62xx Table 13. General hardware register map (continued) Address 0x00 5200 0x00 5201 0x00 5202 0x00 5203 0x00 5204 0x00 5205 0x00 5206 0x00 5207 0x00 5208 to 0x00 520F 0x00 5210 0x00 5211 0x00 5212 0x00 5213 0x00 ...
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Memory and register map Table 13. General hardware register map (continued) Address 0x00 5240 0x00 5241 0x00 5242 0x00 5243 0x00 5244 LINUART 0x00 5245 0x00 5246 0x00 5247 0x00 5248 0x00 5249 0x00 524A to 0x00 524F 34/91 Block ...
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STM8AF61xx, STM8AF62xx Table 13. General hardware register map (continued) Address 0x00 5250 0x00 5251 0x00 5252 0x00 5253 0x00 5254 0x00 5255 0x00 5256 0x00 5257 0x00 5258 0x00 5259 0x00 525A 0x00 525B 0x00 525C 0x00 525D 0x00 525E ...
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Memory and register map Table 13. General hardware register map (continued) Address 0x00 5270 to 0x00 52FF 0x00 5300 0x00 5301 0x00 5302 0x00 5303 0x00 5304 0x00 5305 0x00 5306 0x00 5307 0x00 5308 0x00 5309 0x00 530A 0x00 ...
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STM8AF61xx, STM8AF62xx Table 13. General hardware register map (continued) Address 0x00 5320 0x00 5321 0x00 5322 0x00 5323 0x00 5324 0x00 5325 0x00 5326 0x00 5327 0x00 5328 0x00 5329 0x00 532A 0x00 532B 0x00 532C 0x00 532D 0x00 532E ...
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Memory and register map Table 13. General hardware register map (continued) Address 0x00 53E0 0x00 53E1 0x00 53E2 0x00 53E3 0x00 53E4 0x00 53E5 0x00 53E6 0x00 53E7 0x00 53E8 0x00 53E9 0x00 53EA 0x00 53EB 0x00 53EC 0x00 53ED ...
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STM8AF61xx, STM8AF62xx Table 13. General hardware register map (continued) Address 0x00 5400 0x00 5401 0x00 5402 0x00 5403 0x00 5404 0x00 5405 0x00 5406 0x00 5407 0x00 5408 0x00 5409 0x00 540A 0x00 540B 0x00 540C 0x00 540D 0x00 540E ...
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Memory and register map Table 14. CPU/SWIM/debug module/interrupt controller registers Address Block Register label 0x00 7F00 0x00 7F01 0x00 7F02 0x00 7F03 0x00 7F04 (1) 0x00 7F05 CPU 0x00 7F06 0x00 7F07 0x00 7F08 0x00 7F09 0x00 7F0A 0x00 7F0B ...
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STM8AF61xx, STM8AF62xx Table 14. CPU/SWIM/debug module/interrupt controller registers (continued) Address Block Register label 0x00 7F90 DM_BK1RE 0x00 7F91 DM_BK1RH 0x00 7F92 DM_BK1RL 0x00 7F93 DM_BK2RE 0x00 7F94 DM_BK2RH 0x00 7F95 DM DM_BK2RL 0x00 7F96 0x00 7F97 0x00 7F98 DM_CSR1 0x00 ...
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Interrupt table 8 Interrupt table Table 16. STM8A interrupt table Source Priority block — Reset — TRAP 0 TLI 1 AWU Clock 2 controller 3 MISC 4 MISC 5 MISC 6 MISC 7 MISC 8 Reserved 9 Reserved 10 SPI ...
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STM8AF61xx, STM8AF62xx 9 Option bytes Option bytes contain configurations for device hardware features as well as the memory protection of the device. They are stored in a dedicated block of the memory. Each option byte has to be stored twice, ...
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Option bytes Table 17. Option bytes (continued) Option Option Addr. name byte no. 0x00 OPT6 480B TMU 0x00 NOPT6 480C 0x00 OPT7 480D Flash wait states 0x00 NOPT7 480E 0x00 480F 0x00 OPT8 4810 0x00 OPT9 4811 0x00 OPT10 4812 ...
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STM8AF61xx, STM8AF62xx Table 18. Option byte description Option byte no. OPT0 OPT1 OPT2 Description ROP[7:0]: Memory readout protection (ROP) 0xAA: Enable readout protection (write access via SWIM protocol) Note: Refer to the STM8S and STM8A microcontroller families reference manual (RM0016) ...
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Option bytes Table 18. Option byte description (continued) Option byte no. OPT3 OPT4 OPT5 OPT6 OPT7 OPT8 OPT9 OPT10 OPT11 46/91 Description HSITRIM: Trimming option for 16 MHz internal RC oscillator 0: 3-bit on-the-fly trimming (compatible with devices based on ...
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STM8AF61xx, STM8AF62xx Table 18. Option byte description (continued) Option byte no. OPT12 OPT13 OPT14 OPT15 OPT16 OPT17 Description TMU_KEY 5 [7:0]: Temporary unprotection key 4 Temporary unprotection key: Must be different from 0x00 or 0xFF TMU_KEY 6 [7:0]: Temporary unprotection ...
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Electrical characteristics 10 Electrical characteristics 10.1 Parameter conditions Unless otherwise specified, all voltages are referred to V 10.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply ...
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STM8AF61xx, STM8AF62xx 10.1.5 Pin input voltage The input voltage measurement on a pin of the device is described in Figure 7. Pin input voltage 10.2 Absolute maximum ratings Stresses above those listed as ‘absolute maximum ratings’ may cause permanent damage ...
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Electrical characteristics Table 20. Current characteristics Symbol I Total current into V VDDIO I Total current out of V VSSIO Output current sunk by any I/O and control pin I IO Output current source by any I/Os and control pin ...
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STM8AF61xx, STM8AF62xx 10.3 Operating conditions Table 23. General operating conditions Symbol f Internal CPU clock frequency CPU V V Standard operating voltage DD/ DDIO C EXT capacitor V CAP ESR of external capacitor ESL of external capacitor Power dissipation (all ...
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Electrical characteristics Table 24. Operating conditions at power-up/power-down Symbol VDD V DD Reset release delay t TEMP Reset generation delay Power-on reset V IT+ threshold Brown-out reset V IT- threshold Brown-out reset V HYS(BOR) hysteresis 1. Guaranteed ...
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STM8AF61xx, STM8AF62xx 10.3.1 VCAP external capacitor Stabilization for the main regulator is achieved connecting an external capacitor C V pin specified in CAP EXT to less than 15 nH. Figure 9. External capacitor C 1. Legend: ESR is ...
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Electrical characteristics Table 26. Total current consumption in Halt and Active-halt modes. General conditions for V Symbol Parameter I Supply current in Halt mode DD(H) Supply current in Active-halt mode with regulator on I DD(AH) Supply current in Active-halt mode ...
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STM8AF61xx, STM8AF62xx Table 28. Programming current consumption Symbol I Programming current DD(PROG) Table 29. Typical peripheral current consumption V Symbol I DD(TIM1) I DD(TIM2) I DD(TIM3) I DD(TIM4) I DD(LINUART) I DD(SPI DD(AWU) I DD(TOT_DIG) ...
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Electrical characteristics Figure 12. Typ. I DD(RUN)HSI @ MHz, peripheral = off CPU 2.5 3.5 4.5 VDD [V] Figure 14. Typ. I DD(WFI)HSE @ V = 5.0 V, peripheral = on DD ...
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STM8AF61xx, STM8AF62xx 10.3.3 External clock sources and timing characteristics HSE user external clock Subject to general operating conditions for V Table 30. HSE user external clock characteristics Symbol User external clock source f HSE_ext frequency V Comparator hysteresis HSEdHL OSCIN ...
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Electrical characteristics Table 31. HSE oscillator characteristics Symbol Parameter R Feedback resistor F ( Recommended load capacitance Oscillator transconductance m (2) t Startup time SU(HSE) 1. The oscillator needs two load capacitors ...
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STM8AF61xx, STM8AF62xx 10.3.4 Internal clock sources and timing characteristics Subject to general operating conditions for V High speed internal RC oscillator (HSI) Table 32. HSI oscillator characteristics Symbol Parameter f Frequency HSI HSI oscillator user trimming accuracy ACC HS HSI ...
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Electrical characteristics Low speed internal RC oscillator (LSI) Subject to general operating conditions for V Table 33. LSI oscillator characteristics Symbol f Frequency LSI t LSI oscillator wakeup time su(LSI) 1. Data based on characterization results, not tested in production. ...
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STM8AF61xx, STM8AF62xx 10.3.5 Memory characteristics Flash program memory/data EEPROM memory General conditions: T Table 34. Flash program memory/data EEPROM memory Symbol Operating voltage V DD (all modes, execution/write/erase) Operating voltage V DD (code execution) Standard programming time (including erase) for ...
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Electrical characteristics 10.3.6 I/O port pin characteristics General characteristics Subject to general operating conditions for V unused pins must be kept at a fixed voltage, using the output mode of the I/O for example or an external pull-up or pull-down ...
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STM8AF61xx, STM8AF62xx Figure 20. Typical Figure 21. Typical pull-up resistance Figure 22. Typical pull-up current I Note: The pull- pure resistor (slope ...
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Electrical characteristics Typical output level curves Figure 23 to Figure 32 pin. Figure 23. Typ ports) -40°C 1.5 25°C 85°C 1.25 125°C 1 0.75 0.5 0. [mA] OL Figure ...
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STM8AF61xx, STM8AF62xx Figure 29. Typ (standard ports) -40°C 2 25°C 1.75 85°C 125°C 1.5 1.25 1 0.75 0.5 0. [mA] OH Figure 31. Typ ...
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Electrical characteristics 10.3.7 Reset pin characteristics Subject to general operating conditions for V Table 38. NRST pin characteristics Symbol V NRST input low level voltage IL(NRST) V NRST input high level voltage IH(NRST) V NRST output low level voltage OL(NRST) ...
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STM8AF61xx, STM8AF62xx Figure 34. Typical NRST pull-up resistance Figure 35. Typical NRST pull-up current I 140 120 100 The reset network shown in must ensure that the level on the NRST pin ...
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Electrical characteristics 10.3.8 TIM and 4 timer specifications Subject to general operating conditions for V Table 39. TIM and 4 electrical specifications Symbol f Timer external clock frequency EXT 1. Not tested in production. ...
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STM8AF61xx, STM8AF62xx SPI serial peripheral interface 10.3.9 Unless otherwise specified, the parameters given in performed under ambient temperature, f conditions. t MASTER Refer to I/O port characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO). ...
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Electrical characteristics Figure 37. SPI timing diagram where slave mode and CPHA = 0 NSS input t SU(NSS) CPHA= 0 CPOL=0 t w(SCKH) CPHA w(SCKL) CPOL=1 t a(SO) MISO OUT su(SI) MOSI I NPUT 1. ...
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STM8AF61xx, STM8AF62xx Figure 39. SPI timing diagram - master mode High NSS input CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=0 CPHA=1 CPOL=1 t su(MI) MISO INP UT MOSI OUTUT 1. Measurement points are at CMOS levels: 0 ...
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Electrical characteristics 2 10.3. interface characteristics 2 Table 41 characteristics Symbol t SCL clock low time w(SCLL) t SCL clock high time w(SCLH) t SDA setup time su(SDA) t SDA data hold time h(SDA) t SDA ...
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STM8AF61xx, STM8AF62xx 10.3.11 10-bit ADC characteristics Subject to general operating conditions for V specified. Table 42. ADC characteristics Symbol f ADC clock frequency ADC V Analog supply DDA V Positive reference voltage REF+ V Negative reference voltage REF- V Conversion ...
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Electrical characteristics Table 43. ADC accuracy for V Symbol |E | Total unadjusted error Offset error Gain error Differential linearity error Integral linearity error Total ...
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STM8AF61xx, STM8AF62xx 10.3.12 EMC characteristics Susceptibility tests are performed on a sample basis during product characterization. Functional EMS (electromagnetic susceptibility) While executing a simple application (toggling 2 LEDs through I/O ports), the product is stressed by two electromagnetic events until ...
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Electrical characteristics Electromagnetic interference (EMI) Emission tests conform to the SAE J 1752/3 standard for test software, board layout and pin loading. Table 45. EMI data Symbol Parameter Peak level S EMI SAE EMI level 1. Data based on characterization ...
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... Symbol LU Static latch-up class 1. Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC specifications, that means when a device belongs to class A it exceeds the JEDEC standard. B class strictly covers all the JEDEC criteria (international standard). 2. Available on STM8AF62xx devices only. ...
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Electrical characteristics 10.4 Thermal characteristics In case the maximum chip junction temperature (T operating conditions on page 51 guaranteed degrees Celsius, may be calculated using the following equation: Jmax Where: is the maximum ambient temperature in ° ...
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STM8AF61xx, STM8AF62xx 10.4.2 Selecting the product temperature range When ordering the microcontroller, the temperature range is specified in the order code (see Section 12: Ordering information The following example shows how to calculate the temperature range needed for a given ...
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Package characteristics 11 Package characteristics To meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions, and product status are available at 80/91 Doc ID 14952 ...
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STM8AF61xx, STM8AF62xx 11.1 Package mechanical data Figure 42. 32-lead very thin fine pitch quad flat no-lead package ( Seating plane C Pin # 0.30 Table 49. 32-lead very thin fine pitch quad flat no-lead ...
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Package characteristics Figure 43. 48-pin low profile quad flat package ( Table 50. 48-pin low profile quad flat package mechanical data Dim θ Values in ...
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STM8AF61xx, STM8AF62xx Figure 44. 32-pin low profile quad flat package ( Table 51. 32-pin low profile quad flat package mechanical data Dim θ Values in ...
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Ordering information 12 Ordering information Figure 45. Ordering information scheme Example: Product class 8-bit automotive microcontroller Program memory type F = Flash + EEPROM H = Flash no EEPROM Device family 61 = Silicon rev Y, LIN only 62 = ...
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... In addition, STM8A application development is supported by a low-cost in-circuit debugger/programmer. The STice is the fourth generation of full-featured emulators from STMicroelectronics. It offers new advanced debugging capabilities including tracing, profiling and code coverage analysis to help detect execution bottlenecks and dead code. ...
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... STM8 development tools 13.2 Software tools STM8 development tools are supported by a complete, free software package from STMicroelectronics that includes ST visual develop (STVD) IDE and the ST visual programmer (STVP) software interface. STVD provides seamless integration of the Cosmic and Raisonance C compilers for STM8. 13.2.1 ...
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STM8AF61xx, STM8AF62xx 13.3 Programming tools During the development cycle, STice provides in-circuit programming of the STM8A Flash microcontroller on your application board via the SWIM protocol. Additional tools are to include a low-cost in-circuit programmer as well as ST socket ...
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Revision history 14 Revision history Table 52. Document revision history Date 22-Aug-2008 10-Aug-2009 22-Oct-2009 08-Jul-2010 88/91 Revision 1 Initial release Document revised as the following: Updated Features on page Updated Table 1: Device Updated Section 3: Product Changed Section 5: ...
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STM8AF61xx, STM8AF62xx Table 52. Document revision history (continued) Date 31-Jan-2011 Revision Modified references to reference manual, and Flash programming manual in the whole document. Added reference to AEC Q100 standard on cover page. Renamed timer types as follows: – Auto-reload ...
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Revision history Table 52. Document revision history (continued) Date 31-Jan-2011 90/91 Revision Renamed Fast Active Halt mode to Active-halt mode with regulator on, and Slow Active Halt mode to Active-halt mode with regulator off. Updated Table 26: Total current consumption ...
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... STM8AF61xx, STM8AF62xx Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...